drm/rockchip: dw-mipi: Add reset control for APB

Change-Id: I740b5f6311bfaa6303870ef726be3b1a42b7c4d7
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
index dc4952e8a0e2cd42be6f69430e647a862fc91034..e26bfd4d819e176efb07c918985477b1af381c61 100644 (file)
--- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
@@ -21,9 +21,12 @@ Optional properties
 - phys: phandle to third party MIPI PHY node
 - phy-names: the string "mipi_dphy" when is found in a node, along with "phys"
   attribute, provides phandle to MIPI PHY node
+- resets : phandle to the reset of MIPI DSI APB Clock.
+- reset-names : should be "apb".
 
 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
 [2] Documentation/devicetree/bindings/media/video-interfaces.txt
+[3] Documentation/devicetree/bindings/reset/reset.txt
 
 Example:
 
@@ -78,6 +81,8 @@ mipi_dsi_host: mipi-dsi-host@ff960000 {
        compatible = "rockchip,rk3368-mipi-dsi";
        phys = <&mipi_dphy>;
        phy-names = "mipi_dphy";
+       resets = <&cru SRST_MIPIDSI0>;
+       reset-names = "apb";
        ...
 
        ports@1 {

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 1931247949ffdd25482ed7627a2c9e3acb80ec17..f938f2be3b718b3c15259ab6f7bc07b5195177b3 100644 (file)
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -15,6 +15,7 @@
 #include <linux/phy/phy.h>
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
+#include <linux/reset.h>
 #include <linux/mfd/syscon.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc.h>
@@ -298,6 +299,7 @@ struct dw_mipi_dsi {
        struct drm_panel *panel;
        struct device *dev;
        struct regmap *grf_regmap;
+       struct reset_control *rst;
        void __iomem *base;
 
        struct clk *pllref_clk;
@@ -927,6 +929,14 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
                return;
        }
 
+       if (dsi->rst) {
+               /* MIPI DSI APB software reset request. */
+               reset_control_assert(dsi->rst);
+               udelay(10);
+               reset_control_deassert(dsi->rst);
+               udelay(10);
+       }
+
        ret = dw_mipi_dsi_get_lane_bps(dsi);
        if (ret < 0)
                return;
@@ -1250,6 +1260,12 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
                return ret;
        }
 
+       dsi->rst = devm_reset_control_get_optional(dev, "apb");
+       if (IS_ERR(dsi->rst)) {
+               dev_info(dev, "no reset control specified\n");
+               dsi->rst = NULL;
+       }
+
        ret = dw_mipi_dsi_register(drm, dsi);
        if (ret) {
                dev_err(dev, "Failed to register mipi_dsi: %d\n", ret);