Finley Xiao [Wed, 5 Apr 2017 10:01:48 +0000 (18:01 +0800)]
nvmem: rockchip-efuse: add support for rk3288 secure efuse
This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.
Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Jianqun Xu [Wed, 29 Mar 2017 08:53:54 +0000 (16:53 +0800)]
arm: dts: rk3288-evb: support board with rk818
Change-Id: Iea8b91289c335be8c8f620430837ccf42776abf5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
chenzhen [Thu, 6 Apr 2017 02:38:07 +0000 (10:38 +0800)]
arm64: rockchip_linux_defconfig: disable CONFIG_MALI400_DEBUG
Change-Id: I0fb379772f2f4d99a17439760fe997d0f5ab1eef
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Xu Xuehui [Fri, 24 Mar 2017 01:54:35 +0000 (09:54 +0800)]
net: wireless: rockchip_wlan: update for ap6xxx wifi driver
fix compile warning when CONFIG_DEBUG_SECTION_MISMATCH=y
Change-Id: Iada73b82feed96279fed588adc4cbe47bd6be8f0
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Tang Yun ping [Thu, 6 Apr 2017 07:25:12 +0000 (15:25 +0800)]
clk: rockchip: optimizing ddrclk_scpi_recalc_rate behavior
Cat ddr frequency from rockchip_ddrclk_scpi_set_rate prior to
rockchip_ddrclk_scpi_recalc_rate, to optimizing running time and reduce
SCPI APIs usage rate.
Change-Id: Iba31d33a5920816b1cc230f639ea3a9503d451c8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Thu, 6 Apr 2017 03:03:35 +0000 (11:03 +0800)]
soc: rockchip: scpi: add new function for rk3368
1. amend return frequency for scpi_ddr_set_clk_rate.
2. add scpi_ddr_dclk_mode function for rk3368.
Change-Id: I0f3c42d74e34ccb740f2a9e68ef12bba98b7aab7
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Finley Xiao [Wed, 1 Mar 2017 09:57:56 +0000 (17:57 +0800)]
PM / devfreq: rk3399_dmc: rename of_get_opp_table
The function doesn't get something from dts, it is more appropriate to
rename of_get_opp_table to rk3399_dmcfreq_init_freq_table.
Change-Id: I8c4994d45ff4d0654d034483e091bbb225a1ea61
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Mon, 27 Mar 2017 03:09:51 +0000 (11:09 +0800)]
PM / devfreq: event: add support for rk3368 dfi
This adds the necessary data for handling dfi on the rk3368.
Access the dfi via registers provided by GRF (general register
files) module.
Change-Id: I96c2b4dcd34d90731b749ebdbe6922f01559d8e6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
algea.cao [Thu, 23 Mar 2017 01:58:51 +0000 (09:58 +0800)]
drm/sysfs: add audioformat to sysfs
Change-Id: Iccce2de5dc90ceabd1db7127d8ae53ef849af4c8
Signed-off-by: algea.cao <algea.cao@rock-chips.com>
Huang, Tao [Thu, 27 Oct 2016 11:41:45 +0000 (19:41 +0800)]
arm64: cpuinfo: add system serial support
Change-Id: I4542f07226e47e67be1f2792cffaa71fd6401442
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Finley Xiao [Sat, 25 Mar 2017 12:33:58 +0000 (20:33 +0800)]
clk: rockchip: rk3368: add ddrc clock support
Add a ddrc clock into clk branches, so we can do ddr frequency
scaling on rk3368 platform in future.
Change-Id: Ie7fd2e8d8bdf8b9ff843ca13e848f772adaa109a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Sat, 25 Mar 2017 12:02:35 +0000 (20:02 +0800)]
clk: rockchip: support setting ddr clock via SCPI APIs
On rk3368, let a mcu scaling ddr clock via SCPI (System Control and
Power Interface) APIs.
Change-Id: I95342b876caad991e6d1319c5e4ec793365c7981
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Mark Yao [Thu, 6 Apr 2017 03:06:56 +0000 (11:06 +0800)]
drm/rockchip: vop: support CRTC_STEREO_DOUBLE mode
Change-Id: Ic9905248491a2d728da782d6cfa9679ca50dd6c4
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 6 Apr 2017 03:02:38 +0000 (11:02 +0800)]
drm/rockchip: vop: use crtc_[h/v]display for vop
Change-Id: I1c1263accd419bb790ddb19da9323aaab8b9338e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
zzc [Wed, 5 Apr 2017 08:16:34 +0000 (16:16 +0800)]
net: wireless: rockchip_wlan: add rtl8723cs support
update rtl8723cs wifi driver to version v5.2.1_21569.20170329_COEX20170214-1500
Change-Id: Iee0c342b4fb44a30be0004a2dcee40dea5e67269
Signed-off-by: zzc <zzc@rock-chips.com>
chenjh [Fri, 31 Mar 2017 06:44:03 +0000 (14:44 +0800)]
arm64: rockchip_defconfig: enable CONFIG_FIQ_DEBUGGER_TRUST_ZONE
Change-Id: Id726ec446724de7176717d7ef37861dbea69be1c
Signed-off-by: chenjh <chenjh@rock-chips.com>
Huibin Hong [Mon, 21 Nov 2016 10:08:39 +0000 (18:08 +0800)]
fiq_debugger: merge from linux 3.10
update some features:
1. rename sip smc function name;
2. add serial hw irq and phyical base address parse;
3. use FIQ_DEBUGGER_TRUST_ZONE for armv7 and armv8.
Change-Id: I920899f30cadf1ec8380a2e70f5d1e0e801ec5c2
Signed-off-by: chenjh <chenjh@rock-chips.com>
chenjh [Fri, 17 Mar 2017 08:36:34 +0000 (16:36 +0800)]
firmware: rockchip: update sip interface
clean up code and add support for fiq debugger
Change-Id: I6dc0e4306a8554c49342207191005e55fb662b38
Signed-off-by: chenjh <chenjh@rock-chips.com>
Frank Wang [Thu, 6 Apr 2017 01:36:11 +0000 (09:36 +0800)]
soc: rockchip: fixed compilation error
This adds fixed below errors when compiled rockchip_defconfig without
CONFIG_RK3368_SCPI_PROTOCOL select:
In file included from drivers/clk/rockchip/clk-ddr.c:23:0:
include/soc/rockchip/scpi.h:89:12: warning:
'scpi_sys_set_jtagmux_on_off' defined but not used [-Wunused-function]
error, forbidden warning: scpi.h:89
scripts/Makefile.build:258: recipe for target
'drivers/clk/rockchip/clk-ddr.o' failed
make[3]: *** [drivers/clk/rockchip/clk-ddr.o] Error 1
Change-Id: I5abc184554dcfc3697be82aede8dec27da2fcdd9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
chenjh [Fri, 17 Mar 2017 09:10:43 +0000 (17:10 +0800)]
firmware: psci: remove fiq enable after cpu_suspend
Change-Id: I2fb6cd70ed462eb5abc36be790008daa134810d6
Signed-off-by: chenjh <chenjh@rock-chips.com>
Huibin Hong [Mon, 21 Nov 2016 10:03:31 +0000 (18:03 +0800)]
rk_fiq_debugger: map signal irq for fiq mode
Change-Id: I220067fa3b6efaf4a1e88208a596822fc7120376
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Huibin Hong [Mon, 21 Nov 2016 09:48:39 +0000 (17:48 +0800)]
fiq_debugger: add CONFIG_FIQ_DEBUGGER_EL3_TO_EL1 for arm v8
Change-Id: I6aecf2c7017c3e153d88fe33207f75510051d75c
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Huibin Hong [Mon, 21 Nov 2016 09:47:06 +0000 (17:47 +0800)]
irqchip/gicv2/3: add gic_retrigger
Change-Id: Ic87d4936317fb598c04e3ccc56a850c0c9e4e6ba
Signed-off-by: chenjh <chenjh@rock-chips.com>
chenzhen [Wed, 22 Mar 2017 02:33:35 +0000 (10:33 +0800)]
ARM64: dts: rk3328-evb: enable gpu device
And set its regulator.
Change-Id: I0703ee39059a5d63a5bc259cfc66ca6203819015
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Wed, 22 Mar 2017 02:30:20 +0000 (10:30 +0800)]
arm64: rockchip_defconfig: enable MALI450
Change-Id: I8b6d073da859ac064b2c641539b49104393df2e9
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 6 Mar 2017 07:54:16 +0000 (15:54 +0800)]
arm64: rockchip_linux_defconfig: enable MALI450
Change-Id: I914e4c341f096107def5f76621f9b82ee1f94fe7
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 6 Mar 2017 07:49:23 +0000 (15:49 +0800)]
ARM64: dts: rk3328: add mali-450 GPU device
GPU and DDR share vdd_logic.
DDR DVFS is not ready yet, to ensure DDR could work stably,
vdd_logic(vdd_gpu) should be higher than 1.05V.
This would be optimized after DDR DVFS is ready.
Change-Id: I2749484c7f6f86dde850f0f85d606e1c1ab85c17
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 6 Mar 2017 07:46:13 +0000 (15:46 +0800)]
MALI: utgard: RK: reconstruct platform specific code for devfreq DVFS
Change-Id: I1ddf7be0868fb885784098c14feb16634d76dcd9
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 25 Nov 2016 06:49:51 +0000 (14:49 +0800)]
MALI: utgard: upgrade DDK to r7p0-00rel0
Change-Id: Ia1dc7b104a7bbb743e46d25e2c434e92c5596353
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Thu, 10 Mar 2016 09:31:51 +0000 (17:31 +0800)]
MALI: utgard: upgrade DDK to r6p1-01rel0
Change-Id: I88e8aba740ec223c1107def64eb004390b7fd940
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Wed, 30 Nov 2016 01:14:39 +0000 (09:14 +0800)]
MALI: utgard: RK: remove core_scaling in "platform specific code"
DDK integrate_guide says
"not to use core_scaling on r5p0-01rel0 and later."
Change-Id: Ibb3eddac75548bb9f6763dc4dc9bad540746191f
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Wed, 30 Nov 2016 00:48:43 +0000 (08:48 +0800)]
MALI: utgard: RK: use late_initcall_sync instead of module_init
Some dependences of mali device driver should be initialized first.
Change-Id: I76f1d8b029345801bf0a68266889ec1c5a28b524
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Thu, 10 Nov 2016 06:52:57 +0000 (14:52 +0800)]
MALI: utgard: RK: fix compile errors under arm64
Change-Id: I88df540e9822f148703aa07f74fbea59fbbf3350
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Jianqun Xu [Wed, 5 Apr 2017 08:55:03 +0000 (16:55 +0800)]
arm: dts: rockchip: rk3288-android delete rk timer
Change-Id: Icf045a05ea07c735200d1a54aa7b2576ada82609
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
William Wu [Wed, 5 Apr 2017 08:21:22 +0000 (16:21 +0800)]
arm64: rockchip_linux_defconfig: enable CONFIG_USB_UAS
Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.
Change-Id: I67ce5cdb821413d3c4d018be31c892d20d831470
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Wed, 5 Apr 2017 08:11:08 +0000 (16:11 +0800)]
arm64: rockchip_defconfig: enable CONFIG_USB_UAS
Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.
Change-Id: I69e10d3f55c03c411cd9efcef9a7fd9f8ccb9a53
Signed-off-by: William Wu <wulf@rock-chips.com>
Jianqun Xu [Wed, 5 Apr 2017 07:59:39 +0000 (15:59 +0800)]
arm: dts: rockchip: rk3288 use android dtsi
Change-Id: I7ec75cca855d6c4a697584cec33cb0ac45f00364
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Frank Wang [Wed, 5 Apr 2017 01:35:37 +0000 (09:35 +0800)]
soc: rockchip: amend rk3368-mbox related *.h to soc/rockchip
This adds move rk3368-mbox related *.h files from linux/rockchip
to soc/rockchip.
Change-Id: I2d57b6baa64d531e89766a5384d8c217cf347ebf
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Yakir Yang [Mon, 23 Mar 2015 02:44:12 +0000 (10:44 +0800)]
CHROMIUM: drm: bridge/dw_hdmi: assign CD field to zero
When the color depth is 24 bits per pixel video, the CD
field in General Control Packet should be "Color Depth
not indicated", then the colordepth in register vp_pr_cd
& csc_scale should assign to zero.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
BUG=chrome-os-partner:38212
TEST=speedy board, Test with Agilent Technologies U4002A
HDMI Protocal Analyzer
Change-Id: Ifd5767d339fdbff11e234ec0891c8f3df1dd66a5
Reviewed-on: https://chromium-review.googlesource.com/261850
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Yakir Yang <ykk@rock-chips.com>
Commit-Queue: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Hao Xiaowei [Sat, 1 Apr 2017 01:01:53 +0000 (09:01 +0800)]
arm64: dts: rockchip: Modify rockchip_suspend config for rk3399-mid
Change-Id: I0db8c1ab12cc1e76e0e5730b65dffb4f203e5c37
Signed-off-by: Hao Xiaowei <hxw@rock-chips.com>
Zhangbin Tong [Wed, 5 Apr 2017 02:53:41 +0000 (10:53 +0800)]
arm: dts: rockchip: add mpu6050 to rk3288-evb-act8846
The evaluation board using the mpu6050 as the sensor, which
combine a 3-axis gyroscope and a 3-axis accelerometer
Change-Id: Ia41d2c038e38de3cb6d24d81d4b018670935d39a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Xu Jianqun [Sat, 1 Apr 2017 03:44:36 +0000 (11:44 +0800)]
arm: configs: rockchip_defconfig select CONFIG_RTC_DRV_HYM8563
Change-Id: I0510946469bd10a7ec2f3439505e7b3b7851f4b7
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Randy Li [Sat, 1 Apr 2017 02:55:07 +0000 (10:55 +0800)]
ARM: dts: rockchip: enable 1000Mbps of rk3288
Because of the bad quality of EVB board, its phy will
fail at the GMAC mode. While I have verified the ASUS
tinker, it doesn't have such problem.
Change-Id: I3306b918363dff513e279762482f1ce1eaa30df8
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Jianqun Xu [Sat, 1 Apr 2017 01:08:14 +0000 (09:08 +0800)]
arm: dts: rk3288-android: add psci v1.0 support
Add psci v1.0 support to rk3288, support it to call into
secure world through psci APIs.
Change-Id: I1dc98fbdcc544a2bf0ec09544e946756757d2d80
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Mark Yao [Fri, 31 Mar 2017 12:15:02 +0000 (20:15 +0800)]
drm/rockchip: fix some loader logo bugs
fix some bugs:
1, If all connector failed to display, loader logo can't free.
2, if first route failed to display, loder logo free unexpect,
cause iommu crash.
Change-Id: I838c9fd6768a5ac48d8ce4175038b4620a95cd42
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 31 Mar 2017 10:07:55 +0000 (18:07 +0800)]
drm/rockchip: dw-mipi: add power protect for loader logo
Change-Id: I3bdd70d357324c8f526122dcab1bc44fe0ae0ff2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 31 Mar 2017 09:58:45 +0000 (17:58 +0800)]
drm/rockchip: don't restore to fbdev when display kernel logo
Change-Id: Ie0f53364c51924feb589fa2e8550ef5b423bb4cd
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sat, 1 Apr 2017 09:14:16 +0000 (17:14 +0800)]
drm/rockchip: vop: rk3328: fix overlay abnormal
It's a hardware bug, all window's overlay channel reset
value is same, hardware overlay would be die.
so we must initial difference id for each overlay channel.
Change-Id: Ic0b744b2789a5aff2f6605199e7670cac1ea7214
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 31 Mar 2017 03:32:59 +0000 (11:32 +0800)]
drm/rockchip: vop: correct rk3328 vop windows
Rk3328 only have three windows, it's mistake add four windows.
Change-Id: I2a9495c6be407d12dbc9033f44a4cd6b2f54ff1a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 31 Mar 2017 07:20:07 +0000 (15:20 +0800)]
drm/rockchip: protect connector status with loader protect
In order to keep display not flash, we cheat all connectors status
as power on, but actually the connector's driver think it's off.
So when power off connector, we need correct connector's status first.
Change-Id: I9fa09d184197c71220d33666564876fc3b1212a7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
xuhuicong [Wed, 29 Mar 2017 01:20:53 +0000 (09:20 +0800)]
Revert "drm/rockchip: fixup display reference count"
fix display abnormal when enable uboot logo display
This reverts commit
6db46c9e7e25ca20ce891a117bf5128c66c0992c.
Change-Id: I85b60c1b90bef939427bcbb795f7dcca490cec46
Signed-off-by: xuhuicong <xhc@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Jianqun Xu [Sat, 1 Apr 2017 01:05:16 +0000 (09:05 +0800)]
arm: dts: rk3288-android: use non-secure dmac
Use non-secure dmac instead of secure one.
Change-Id: I28605b1047177e4710ef417fc36631ff8d76295a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Jianqun Xu [Sat, 1 Apr 2017 01:11:35 +0000 (09:11 +0800)]
arm: dts: rk3288-android: disable rockchip timer
Disable rockchip timer for rk3288 core dts file.
Change-Id: I684dacb78da8a40e37b9aff15eb456995c02f807
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Jianqun Xu [Sat, 1 Apr 2017 08:52:13 +0000 (16:52 +0800)]
arm: dts: rk3288-android: fix rga to rockchip,rga2
Fix compatible of rga to "rockchip,rga2", and modify the clock names
to work fine with current driver.
Change-Id: Idfdae4f3bc2218472261546024b331c33bd3c270
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Jacob Chen [Wed, 4 Jan 2017 06:01:02 +0000 (14:01 +0800)]
drm: bridge: analogix/dp: Fix the dead lock when disable bridge
dead lock :
IN --> drm_fb_helper_restore_fbdev_mode_unlocked
1. Acquire mode_config lock
IN --> atomic commit
IN --> rockchip_atomic_commit_complete
IN --> drm_atomic_helper_commit_modeset_disables
IN --> bridge disable
IN --> analogix_dp_irq_thread
IN --> drm_helper_hpd_irq_event
3. Acquire mode_config lock (have been acquired)
[ 363.054554] INFO: task irq/54-analogix:174 blocked for more than 120 seconds.
[ 363.054612] Not tainted 4.4.55 #31
[ 363.054631] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 363.054651] irq/54-analogix D
ffffff8008084f98 0 174 2 0x00000000
[ 363.054691] Call trace:
[ 363.054726] [<
ffffff8008084f98>] __switch_to+0xb4/0xc0
[ 363.054759] [<
ffffff8008b21308>] __schedule+0x3f0/0x670
[ 363.054785] [<
ffffff8008b2160c>] schedule+0x84/0xa4
[ 363.054813] [<
ffffff8008b21954>] schedule_preempt_disabled+0x20/0x38
[ 363.054842] [<
ffffff8008b23084>] __mutex_lock_slowpath+0xfc/0x178
[ 363.054869] [<
ffffff8008b2312c>] mutex_lock+0x2c/0x44
[ 363.054897] [<
ffffff800844419c>] drm_helper_hpd_irq_event+0x34/0x154
[ 363.054929] [<
ffffff800848e578>] analogix_dp_irq_thread+0x30/0x58
[ 363.054957] [<
ffffff80080eb198>] irq_thread_fn+0x28/0x68
[ 363.054991] [<
ffffff80080eb3ac>] irq_thread+0x10c/0x1ec
[ 363.055016] [<
ffffff80080b7e58>] kthread+0xe8/0xf0
[ 363.055042] [<
ffffff8008082690>] ret_from_fork+0x10/0x40
[ 363.055097] INFO: task surfaceflinger:240 blocked for more than 120 seconds.
[ 363.055119] Not tainted 4.4.55 #31
[ 363.055136] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 363.055155] surfaceflinger D
ffffff8008084f98 0 240 1 0x00000009
[ 363.055191] Call trace:
[ 363.055214] [<
ffffff8008084f98>] __switch_to+0xb4/0xc0
[ 363.055241] [<
ffffff8008b21308>] __schedule+0x3f0/0x670
[ 363.055268] [<
ffffff8008b2160c>] schedule+0x84/0xa4
[ 363.055292] [<
ffffff80080ea61c>] synchronize_irq+0x64/0x98
[ 363.055316] [<
ffffff80080eb9d8>] disable_irq+0x20/0x2c
[ 363.055344] [<
ffffff800848e224>] analogix_dp_bridge_disable+0x70/0xa8
[ 363.055370] [<
ffffff800846fabc>] drm_bridge_disable+0x2c/0x38
[ 363.055403] [<
ffffff800844b930>] drm_atomic_helper_commit_modeset_disables+0x120/0x39c
[ 363.055432] [<
ffffff800847e018>] rockchip_atomic_commit_complete+0x30/0x14c
[ 363.055459] [<
ffffff800847e1b0>] rockchip_drm_atomic_commit+0x7c/0x9c
[ 363.055484] [<
ffffff800846e898>] drm_atomic_commit+0x64/0x70
[ 363.055511] [<
ffffff800844ae28>] drm_atomic_helper_connector_dpms+0xf4/0x154
[ 363.055541] [<
ffffff800846398c>] drm_mode_obj_set_property_ioctl+0x148/0x204
[ 363.055575] [<
ffffff8008463a88>] drm_mode_connector_property_set_ioctl+0x40/0x60
[ 363.055602] [<
ffffff80084541a8>] drm_ioctl+0x27c/0x400
[ 363.055630] [<
ffffff80081ba1d4>] do_vfs_ioctl+0x4d0/0x5c0
[ 363.055655] [<
ffffff80081ba324>] SyS_ioctl+0x60/0x88
[ 363.055680] [<
ffffff80080826f0>] el0_svc_naked+0x24/0x28
Change-Id: I6d5eeb83b9640a54b33b1cad03c2207196a56e16
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Shawn Lin [Sat, 1 Apr 2017 02:10:29 +0000 (10:10 +0800)]
arm64: dts: rockchip: fix sdmmc1_bus4 pinctrl for rk3328
Change-Id: I295022600b1834ca83029ae51634b90f241db432
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Shawn Lin [Sat, 1 Apr 2017 02:08:27 +0000 (10:08 +0800)]
arm64: dts: rk3328-evb: add sdio and sdmmc support
Change-Id: Ic17d8aa5c2468685b7a5eb447b2578f410b0b47b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Hans Yang [Sat, 1 Apr 2017 07:14:05 +0000 (15:14 +0800)]
arm64: dts: rockchip: disable gmac support for rk3328-evb
Change-Id: I723bf633087713c3ebcfd92eb42e8c7005ecbe38
Signed-off-by: Hans Yang <yhx@rock-chips.com>
Xu Xuehui [Sat, 1 Apr 2017 01:43:33 +0000 (09:43 +0800)]
arm64: dts add Rockchip RK3328 EVB board for wifi
Change-Id: Ia6588ebd31e34230ff137edc60cb7ffc433391e5
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Jianqun Xu [Fri, 31 Mar 2017 08:47:06 +0000 (16:47 +0800)]
arm: dts: rockchip: rk3288 add android.dtsi
Change-Id: I180b59363766938ed17e10fa4c574b2613f59c9a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
algea.cao [Mon, 27 Mar 2017 08:34:35 +0000 (16:34 +0800)]
drm/bridge: dw_hdmi: set vdisplay for frame packing 3d mode
This patch is only applicable to 3d frame packing
of progressive mode.
According to HDMI Specification 1.4b 8.2.3.2,
vertical toatal line is x2 of 2D vertical toatal line
and pixel clock frequency is x2 of 2D pixel clock frequency.
vdisplay += vtotal
mpixelclock *= 2
Change-Id: I097c25cd1a930635e33f0a7bc86797ad1c7ed607
Signed-off-by: algea.cao <algea.cao@rock-chips.com>
algea.cao [Tue, 28 Mar 2017 00:58:10 +0000 (08:58 +0800)]
drm/bridge: dw_hdmi: initialize hdmi i2c when system resume
Change-Id: Ie9373517e255c91ded38a4e620d15d5cfd0bd9c4
Signed-off-by: algea.cao <algea.cao@rock-chips.com>
xuhuicong [Wed, 29 Mar 2017 07:01:40 +0000 (15:01 +0800)]
ARM64: dts: rk3399-box-rev2: enable hdmi uboot logo display
Change-Id: I90939866aafa8bac613d05528adfefcd6d88f711
Signed-off-by: xuhuicong <xhc@rock-chips.com>
xuhuicong [Wed, 29 Mar 2017 03:39:26 +0000 (11:39 +0800)]
drm/rockchip: dw_hdmi: add power domain control
close pd when suspend, no when plug out because hotplug detect need it.
make hdmi probe before dp otherwise the shared power domain will be
close after dp probe and cause splash screen when starting kernel if
hdmi uboot logo display
Change-Id: I82ba1abdaf7567173df9ad900d57eca0e6be3932
Signed-off-by: xuhuicong <xhc@rock-chips.com>
Elaine Zhang [Fri, 31 Mar 2017 03:18:39 +0000 (11:18 +0800)]
clk: rockchip: rk3399: Don't allow VPLL as aclk_cci clock source
vpll is just for dclk_vop.
Don't allow are other child under the VPLL.
Change-Id: I755348b4104b532c693c6874127a25721187a4ad
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Rocky Hao [Fri, 31 Mar 2017 09:02:39 +0000 (17:02 +0800)]
thermal: rockchip: rk3368: fix efuse value of temp ajust code issue
bit 7 of efuse value of temp ajust code indecates positive or negtive.
if bit 7 is set, it indecats a negtive ajust code.
Change-Id: I2b604b6b5e566df08b871c817cf25541292575bc
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 00:55:45 +0000 (00:55 +0000)]
drivers: video: rockchip: vcodec_dma_map_sg maybe fail
switching front and rear camera, maybe cause memory exhausted.
in this case, vpu driver must print a warning.
Change-Id: I60f3bfb662f42025624988a5a09ce7f69b358ea6
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 03:17:32 +0000 (03:17 +0000)]
arm64: dts: rk3368-android: enable iep default
Change-Id: Ifcffd957c916b384c32915c4c23c1ad405e4e40e
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 03:16:47 +0000 (03:16 +0000)]
arm64: dts: rk3368: add iep device node
Change-Id: I1ce93563fdb65c74ddd6afc73a1a96ed9353cfa6
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 03:16:23 +0000 (03:16 +0000)]
arm64: dts: rk3399-android: enable iep default
Change-Id: Ic32c5d3f4332f5e0e548e4d0c75b8fd252ff10dc
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 06:35:20 +0000 (06:35 +0000)]
arm64: dts: rk3399-android-6.0: enable iep default
Change-Id: Icb886247d24b631c2064481b1d6840e82d60c63e
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 03:15:44 +0000 (03:15 +0000)]
arm64: dts: rk3399: add iep device node
Change-Id: I725d4668fd5fa29f94055d8ce36b81bcd29c2d52
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jung Zhao [Thu, 30 Mar 2017 06:39:33 +0000 (06:39 +0000)]
arm64: dts: rk3399-android-6.0: remove iep device node
Change-Id: I26bd7e659c929cba3d67ad623b09bfdad260b281
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jianqun Xu [Fri, 31 Mar 2017 06:50:54 +0000 (14:50 +0800)]
arm64: dts: rockchip: rk3368 emmc add property 'mmc-hs200-1_8v'
Add property 'mmc-hs200-1_8v' for emmc, to support hs200, and
remove the unused property caps2-mmc-hs200.
Change-Id: I9040d004bf78987d5bed7e49ad891c47a47970a9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Jung Zhao [Fri, 25 Nov 2016 07:41:33 +0000 (15:41 +0800)]
video: rockchip: iep: add drm support
iep drm support is similar with vcodec drm support. change the allocator
part from ion to drm.
Change-Id: I67c7ac795b768c85e80817262a947a20e9804ec8
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Mark Yao [Thu, 30 Mar 2017 12:23:53 +0000 (20:23 +0800)]
video/rockchip: rga2: use axi safe reset
RGA2_SYS_CTRL bit[6] a safe reset, it would be ensure all
axi write/read operation into completion
Change-Id: I39a5a6a9f10883d355c428e9dbaa89778682c49b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huang, Tao [Fri, 31 Mar 2017 07:15:45 +0000 (15:15 +0800)]
rk: gcc-wrapper.py ignore memcontrol.c:5337
Change-Id: I3052d1659e45c7c2b36578abf3d52b97a32c8af3
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Fri, 31 Mar 2017 03:43:47 +0000 (11:43 +0800)]
Merge tag 'lsk-v4.4-17.03-android' of git://git.linaro.org/kernel/linux-linaro-stable.git
LSK 17.03 v4.4-android
* tag 'lsk-v4.4-17.03-android': (166 commits)
Linux 4.4.55
ext4: don't BUG when truncating encrypted inodes on the orphan list
dm: flush queued bios when process blocks to avoid deadlock
nfit, libnvdimm: fix interleave set cookie calculation
s390/kdump: Use "LINUX" ELF note name instead of "CORE"
KVM: s390: Fix guest migration for huge guests resulting in panic
mvsas: fix misleading indentation
serial: samsung: Continue to work if DMA request fails
USB: serial: io_ti: fix information leak in completion handler
USB: serial: io_ti: fix NULL-deref in interrupt callback
USB: iowarrior: fix NULL-deref in write
USB: iowarrior: fix NULL-deref at probe
USB: serial: omninet: fix reference leaks at open
USB: serial: safe_serial: fix information leak in completion handler
usb: host: xhci-plat: Fix timeout on removal of hot pluggable xhci controllers
usb: host: xhci-dbg: HCIVERSION should be a binary number
usb: gadget: function: f_fs: pass companion descriptor along
usb: dwc3: gadget: make Set Endpoint Configuration macros safe
usb: gadget: dummy_hcd: clear usb_gadget region before registration
powerpc: Emulation support for load/store instructions on LE
...
Change-Id: I4db95bbe5b2523e19ddf22b3f65863f7f6d46632
Jianqun Xu [Fri, 31 Mar 2017 01:59:16 +0000 (09:59 +0800)]
arm64: dts: rockchip: rk3368 emmc add property 'caps2-mmc-hs200'
Change-Id: I5735f2168de63abe2a00ef550495f6561bfde1cb
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Zheng Yang [Wed, 29 Mar 2017 02:24:21 +0000 (10:24 +0800)]
ARM64: dts: rk3399-android: set ddc scl clock rate to 50KHz
Change-Id: I2549164b5b8e0e255b87445082e173ae809ab49c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Zheng Yang [Tue, 28 Mar 2017 10:28:16 +0000 (18:28 +0800)]
drm: bridge: dw-hdmi: set ddc scl clock rate according to dts
To set dw hdmi i2c bus adapter scl clock rate, we introduce two device
tree parameter, ddc-i2c-scl-high-time-ns and ddc-i2c-scl-low-time-ns.
ddc-i2c-scl-high-time-ns: how many ns SCL hold high
ddc-i2c-scl-low-time-ns: how many ns SCL hold low
After measurement, 50KHz scl clock rate recommended configuration is:
&hdmi {
ddc-i2c-scl-high-time-ns = <9625>;
ddc-i2c-scl-low-time-ns = <10000>;
};
100KHz recommended configuration is:
&hdmi {
ddc-i2c-scl-high-time-ns = <4708>;
ddc-i2c-scl-low-time-ns = <4916>;
};
If dts parameter is not available, the default scl rate is 100KHz.
Change-Id: I6f6b0bf1694ab59e70da789ead99e15a53c93e4d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Frank Wang [Tue, 28 Mar 2017 09:32:36 +0000 (17:32 +0800)]
usb: dwc_otg_310: add rk3288 usb otg support
This adds amend usb otg driver to support rk3328-evb board.
Change-Id: I152bedb64367ddf9c556e330b31c018f385c3fd7
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Sugar Zhang [Thu, 30 Mar 2017 03:00:34 +0000 (11:00 +0800)]
ARM64: dts: rk3328: add pdm node
Change-Id: Ib3ae44d970e889d512cb89a738b2dd633dbc9a7f
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Thu, 30 Mar 2017 02:59:34 +0000 (10:59 +0800)]
ASoC: rockchip: add support for pdm controller
Change-Id: Id031c9a1b29fbf7b67d9feb7c8e20daabb0d32d9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Mark Yao [Thu, 30 Mar 2017 12:17:35 +0000 (20:17 +0800)]
video/rockchip: rga2: retry 10 times when timeout
Change-Id: I06b55f282c73735e4a0a5fa4e96f042f8b017646
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 30 Mar 2017 10:44:47 +0000 (18:44 +0800)]
video/rockchip: rga2: reduce work timeout to 100ms
100ms timeout is enough, 2 second timeout is too long.
Change-Id: I02f37280733dae307e81b417d9f3f547ba50259d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Frank Wang [Wed, 29 Mar 2017 10:34:10 +0000 (18:34 +0800)]
arm: dts: rk3288-evb: add rockchip-relinquish-port quirk for ehci
This adds force abnormal ohci relinquish port owner
and back to ehci on rk3288 SoC.
Change-Id: I33be55c08762be7e8a239f741a8c8dbb28522306
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Wed, 29 Mar 2017 10:26:34 +0000 (18:26 +0800)]
usb: ehci: add rockchip relinquishing port quirk support
Add a quirk to support rockchip relinquishing port from abnormal ohci
to ehci when FS/LS devices plug in.
To support this function, the rockchip-relinquish-port property must be
specified in ehci node of dt.
Change-Id: I91b58905132282ef2a836d54a1c7ace1e334d119
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Wed, 29 Mar 2017 10:03:07 +0000 (18:03 +0800)]
Revert "usb: ehci-platform: support no relinquishing port quirk"
This reverts commit
0fd1853df055.
We found this commit just work well for HS devices, however,
ehci_hub_control will set port owner to companion according line
status bits when FS/LS device is plugged in, so revert this one
and introduce a new workaround.
Change-Id: Ifa856620672191c845abc53a76370cd5bf4097dc
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Sugar Zhang [Thu, 30 Mar 2017 03:11:12 +0000 (11:11 +0800)]
ASoC: rockchip: add support for rk3328 spdif
Change-Id: Ia5eceaafed507e141d0de198839134c8c379d42b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Shawn Lin [Thu, 30 Mar 2017 01:30:50 +0000 (09:30 +0800)]
mmc: core: use default generic cmd6 timeout for flushing cache
We need a luxury timeout once needing some extra time to
wait for flushing cache.
Change-Id: I8cd4015f30fa45cacdb984f0461b1ad8ee6cba7d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
chenjh [Thu, 30 Mar 2017 01:30:22 +0000 (09:30 +0800)]
power: rk818-battery: fix charge voltage table define error
Change-Id: Ica6f1a11846a93485847406fdcd914d76662eda4
Signed-off-by: chenjh <chenjh@rock-chips.com>
Ville Syrjälä [Wed, 9 Mar 2016 20:07:46 +0000 (22:07 +0200)]
UPSTREAM: drm/edid: Extract SADs properly from multiple audio data blocks
SADs may span multiple CEA audio data blocks in the EDID.
CEA-861-E says:
"The order of the Data Blocks is not constrained. It is also possible
to have more than one of a specific type of data block if necessary to
include all of the descriptors needed to describe the sink’s capabilities."
Each audio data block can carry up to 10 SADs, whereas the ELD SAD limit
is 15 according to HDA 1.0a spec. So we should support at least two data
blocks. And apparently some devices take a more liberal interpretation
and stuff only one SAD per data block even when they would fit into one.
So let's try to extract all the SADs we can fit into the ELD even when
they span multiple data blocks.
While at it, toss in a comment to explain the 13 byte monitor name
string limit which confused me at first.
Cc: Arturo Pérez <artur999555@gmail.com>
Tested-by: Arturo Pérez <artur999555@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94197
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1457554066-8739-1-git-send-email-ville.syrjala@linux.intel.com
(cherry picked from commit
7c01878254daadbb91f5b1137b7404d952e3931b)
Change-Id: I18c5c64b69802a6a50de624d55b4b5217943b76e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
WeiYong Bi [Thu, 30 Mar 2017 00:30:13 +0000 (08:30 +0800)]
arm64: rockchip_defconfig: enable CONFIG_PHY_ROCKCHIP_DP
Change-Id: Icdaad2e5aa8b54b0b27a6770e9d6354b13822900
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Zheng Yang [Thu, 2 Mar 2017 09:38:50 +0000 (17:38 +0800)]
drm: bridge: dw-hdmi: add debugfs node
Create two debugfs node to debug hdmi controller and phy.
Use following command to debug:
Read hdmi controller register:
cat /d/dw-hdmi/ctrl
Read hdmi phy register:
cat /d/dw-hdmi/phy
Write hdmi controller register:
echo <reg> <val> > /d/dw-hdmi/ctrl
Write hdmi phy register:
echo <reg> <val> > /d/dw-hdmi/phy
<reg> and <val> is hexadecimal.
Change-Id: I02e40cc94aa651ff0734feddbfa7d816edcf222f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Jung Zhao [Mon, 27 Mar 2017 06:00:08 +0000 (14:00 +0800)]
video: rockchip: vpu: clear mmu status when vpu reset
Change-Id: I9c8f02e5275b2a5e286b4306a2390b8cbfdcbbe5
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jacob Chen [Thu, 23 Mar 2017 01:58:29 +0000 (09:58 +0800)]
ARM: dts: rk3288: set simple_ondemand parameter for gpu
Change-Id: If69037b42d424521abd9fb1f0826441068cfd94f
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 23 Mar 2017 01:03:23 +0000 (09:03 +0800)]
MALI: midgard: Linux: support custom ondemand_data
get parameter from dts
Change-Id: Id1b11e3d6a5809cbd4f6f52b1595562e0fa66f70
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Finley Xiao [Sat, 25 Mar 2017 10:31:25 +0000 (18:31 +0800)]
clk: rockchip: add SCLK_DDRC id for rk3368 ddrc
Add the needed id for the ddr clock.
Change-Id: Ib2a4d8dffef5b393e294df49a925577f14306e72
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
dalon.zhang [Fri, 24 Mar 2017 10:37:05 +0000 (18:37 +0800)]
camera: rockchip: camsys version 0.0x21.0xb
some log is so boring, set print level more high.
Change-Id: I8cfe16f535718a130fa03ee7173e4ef325239e06
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>