ahci: Add Device ID for ASMedia 1061R and 1062R

Change-Id: Idecc85eb9af85dbb7e6fcca95aa63762bcf1c2b4
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

arm64: dts: rockchip: config pwm polarity on rk3399-mid

Change-Id: Icbc406cb737c8ee00fd63b218bde3751611acc19
Signed-off-by: Zhou weixin <zwx@rock-chips.com>

arm64: dts: rk3368-android: enable isp

Change-Id: Ib658fb798bb24b9686a78b4a2b64ab9fcc1a92f6
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>

arm64: dts: rk3368: add isp config

Change-Id: I279afac575d17f534ce028ec13fbec7798b117d9
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>

drm: bridge: dw-hdmi: enable 3d mode

Change-Id: I45c4b0ded4aeaf24122d5cc6eb49b6bc72afc060
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

camera: rockchip: camsys v0.0x21.0xa

Change-Id: Ic9c5661ba76eaf8aee36e1a1822aa9bcd288e0ac
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>

arm64: dts: rockchip: update thermal config for rk3368

add cpus' dynamic power coefficient and update alert temperature

Change-Id: I502e49d52268b63625e01103b50e6c18fb8da8b0
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

arm64: dts: rockchip: enable tsadc node for rk3368 p9 board

Change-Id: I5d8b84248b0c713068143df303427ef31cb78963
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

arm64: dts: rk3368-android: debug uart id change to uart3

Change earlycon and console to uart3.

Change-Id: I7c6d7322e077b605b209dce4cf51afb26b9147dc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rk3368: hdmi disabled default and remove hdmi node from p9 board

Change-Id: I034f119de02a04841b8b70746ef63c73a170988f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

arm64: dts: rockchip: rk3368: xin32k use the fixed clk

If xin32k use the rk808_clkout1, rk808 init is too late,
xin32k enable count and prepare count is not match with it's child clk.

Change-Id: I314776c5024fdf3373619968582497e0e2d5666f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: enable tsadc node for rk3368 sheep board

Change-Id: I82c8ef62f5e149d07c76e3a3d971e4222d9b8ecf
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

arm64: dts: rockchip: update tsadc node for rk3368

Change-Id: I0c99dcc6b5515639a496b915832542c3b844f4c8
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

arm64: configs: rockchip_defconfig: enable rk3368 thermal

Change-Id: Ied2658479d5cccc404623af39da2c6cbe028bae0
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

thermal: rockchip: add rk3368 support

Change-Id: I970fedca9542c724d777c0bac788300c4fa21303
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

nvmem: rockchip-efuse: Fix dependencies

Not every rockchip efuse depends on ROCKCHIP_SIP, so delete
dependencies in Kconfig. It is more appropriate to add
dependencies for sip_smc_secure_reg_read/write.

Change-Id: I7f551f9fe71ced847657531e3c3cf418766fa3a4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

arm64: dts: rockchip: add RK3399 Firefly Board for Linux Opensource

Add Firefly board dts file for Linux Opensource project

Change-Id: Ia525b7ff17f4d74990625e2e02c764996f57e520
Signed-off-by: hero.huang <hero.huang@rock-chips.com>

arm64: dts: rk3368-p9: add usb host

Change-Id: Ief0045ac99d3af4db22042d468b67609d6fddf2f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

arm64: dts: rk3368-p9&sheep: disable uart2

Disable uart2 since gpio mux on uart with sdmmc, and rk3368 use
fiq debugger, the uart2 could set to be disabled.

Change-Id: I2d784ccd6cf7526afc0f3bae54914e05febf91a6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rk3368-p9: enable sdmmc

Change-Id: Ib2849e2af020c744e33f0ab1baefbe50cecaa80b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

FROMLIST: drm/core: Reuse the reserved member in drm_event_vblank for crtc_id.

When doing a atomic commit affecting multiple crtc's, multiple events
are generated. The user_data member does not allow you to distinguish,
because they all have the same pointer.

I've chosen to use crtc_id, because using pipe would create ambiguity
when pipe = 0. A test for != 0 is easier to implement, and crtc_id
will never be 0.

Change-Id: Ie2daba50f711f298872f15498b8d46dedb38c0ff
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Stone <daniels@collabora.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9272895/)

arm64: dts: rk3368-android: enable rga

Change-Id: I869f4bae54f72dc384c644fe3a0a499db2af3dbf
Signed-off-by: Zikim,Wei <wzq@rock-chips.com>

arm64: dts: rk3368-sheep: fix sheep backlight

Change-Id: Ief2603afd33a65158bf6e86f08e53f96573ce486
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: backlight: pwm_bl: fix backlight polarity

Backlight polarity not works without pwm_adjust_config.

Change-Id: I11e5eefe340f758b6721021f13238306b3721270
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rk3368: enable uboot loader logo

Change-Id: I4807ac2aafd9cf319e37eacd184c1eae3ea36242
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3368: p9: fix dc detect failed

Change-Id: Ia4cd3528725dd4de250b9417295e7705eb16c412
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>

arm64: dts: rk3368-sheep: support mipi display

Change-Id: Ibeadd258ccbcd68a6c96fb08e7bfbcea79e5e6c6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rk3368-android: reserve memory for drm-logo

Change-Id: I81b401d5561c67012f4d42d1640a6b1176490ca4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

ARM64: dts: rk3368: p9: Add MIPI DSI panel support

Change-Id: I0d42d9ccd7ba09338c3074d1328ab5ec18079c27
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rk3368-android: enable display and vop

Change-Id: Iad1bd3544191d3badc8d0d8b8d9be363e3ac6ed6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

clk: rockchip: rk3368: add CLK_SET_RATE_PARENT flag for dclk_vop

dclk_vop only allowed on NPLL.

Change-Id: I5325a530d3052de1e8685c39b90357291f0f4fb3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

nvmem: Fix dependencies for ROCKCHIP_EFUSE

On some rockchip platforms, need use secure interface to access efuse.

Change-Id: I49a4d5e547b689ff1665f1eb29a1dbbba5ef2595
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

firmware: Kconfig: ROCKCHIP_SIP depends on HAVE_ARM_SMCCC and ARCH_ROCKCHIP

HAVE_ARM_SMCCC is default selected by ARM(if CPU_V7) or ARM64

Change-Id: I4bc64d4c98de5fad3179b3121b0f361d6337732c
Signed-off-by: chenjh <chenjh@rock-chips.com>

arm64: rockchip_defconfig: enable CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY

Change-Id: Iba7bd03c86691670990102e2202bf5c4e2a718b8
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

clk: rockchip: rk3368: remove the flag ROCKCHIP_PLL_SYNC_RATE for NPLL

NPLL is used for vop dclk, sync rate flag would cause loader display
abnormal.

Change-Id: Ia170a8d0b7d1f39e2c9dcbc10b5d33fd1886d5f7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3368-android: remove rkfb related nodes

Change-Id: I6a180419aabd705736fa1274c3463bad0cb95304
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rk3368: don't assign clock rates for display pll

NPLL is used for display pixelclock, assign clock rates would overlap
loader pll setting, cause display abnormal.

Change-Id: Iaf1094c43526c7ca7b364608fa7153d03f84326c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rk3368: assign clock rates for aclk_vop and hclk_vop

Change-Id: I1d8559f09cd2df516aa8d479aa1b7407418916aa
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3368: Add MIPI DSI support

Change-Id: Ia74bb0726cb23acc914f976acf76849f0e764280
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

drm/rockchip/dsi: dw-mipi: Add support for RK3368 MIPI DSI Controller Host

Change-Id: I6c16b5a51451cdfc112a0bdefb44ad5a4b216c4f
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

phy: Add support for INNO MIPI D-PHY

The INNO MIPI D-PHY is built in witch a standard digital interface
to talk to any third part Host controller.That is part of Rockchip SoCs,
like rk3368.

Change-Id: I9806882e0e3fb6b20348015d0f34923d1bc46b89
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

arm64: dts: rockchip: rk3368 enable pmu node

Change-Id: I031fb437a84b19bb7cc389acb2404777f732cf6c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: dts: rockchip: rk3368: add qos node

when pd power on/off, the qos regs need to save and restore.

Change-Id: I34146660e75609517463d679271386b536401b20
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

firmware: rockchip: fix AARCH32 compile warning

Change-Id: I31924c9a1180d7fe034233c7ebd90413a7fa0fc3
Signed-off-by: chenjh <chenjh@rock-chips.com>

arm64: dts: rk3368: set higher voltage for gpu dvfs

As GPU share voltage domain with DDR and the minimum voltage of DDR
696MHz is 1100mV, GPU's voltage must be equal or greater than 1100mV.

After add ddr frequency scaling support, we can change them again.

Change-Id: I761931675265aac75425bf1cc9c7280a33f91e16
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

drm/bridge: dw_hdmi: clear ih_mute register when system resume

HDMI PD is power off when system suspend, so ih_mute register
bit0 mute_all_interrupt will be reset to 1 when system resume.
HPD interrupt will be mask, that would cause hdmi plugin could
not be detected.

Change-Id: I3bf2e6116e902cd516a7ac69fbe8569ca943e853
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

arm64: dts: rockchip: modify cpu's opp table for rk3368

Change-Id: I2f7f15f9b3a9e6190e5e8895e9e4fe939d284b43
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

FROMLIST: arm64: dts: rockchip: rk3368 swap clust0 and clust1

Before this patch, clust1 has little core0~3, clust0 has big core0~3
cpu_l | cpu0 |
cpu_l | cpu1 | clust1
cpu_l | cpu2 |
cpu_l | cpu3 |
----------------------
cpu_b | cpu4 |
cpu_b | cpu5 | clust0
cpu_b | cpu6 |
cpu_b | cpu7 |

With this patch, clust0 will have little core0~3, clust1 will have big core0~3
cpu_l | cpu0 |
cpu_l | cpu1 | clust0
cpu_l | cpu2 |
cpu_l | cpu3 |
----------------------
cpu_b | cpu4 |
cpu_b | cpu5 | clust1
cpu_b | cpu6 |
cpu_b | cpu7 |

It makes no other change, just keep same with other SoCs definations.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9625109/)

Change-Id: I1beea4d3e75409d3a1f1614b0b86f1a929db4eee

arm64: dts: rockchip: add linux,pci-domain for PCIe

We need this to ask PCIe bus allocater to always
assign 0 to our root bus isntead of increasing it
, otherwise the hierarchy would be wrong if we unbind
and bind the root port.

Change-Id: I4ada61c89e617c7bccd92c5f9fa3334cae40603e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

UPSTREAM: PCI: Add pci_unmap_iospace() to unmap I/O resources

Add pci_unmap_iospace() to undo what pci_remap_iospace() did.

This is needed to support hotplug removal of host bridges that use
pci_remap_iospace().

Change-Id: Iee5d778cb8ddfedab59c55c227a8c60825786854
[bhelgaas: changelog]
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
(cherry picked from 4d3f13845957a87729a324cce8509fad8826ef5)
Conflicts:
drivers/pci/pci.c

UPSTREAM: PCI: rockchip: Fix rockchip_pcie_probe() error path to free resource list

rockchip_pcie_probe() calls of_pci_get_host_bridge_resources() to parse
resources from DT and build a resource list.  The caller is responsible for
disposing of the resource list.  This is normally done by
pci_release_host_bridge_dev() when the host bridge is removed.

If the host bridge probe fails, dispose of the resource list in the probe
error path.

Change-Id: Iefc17963a6ce99c64f2940d8dc2ba93bd00fe120
[bhelgaas: changelog]
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from f1d722b607d610b66785f7f00d2e1d457260647c)

PCI: rockchip: remove the warning log of 32bit-access only

That prevents me from doing git-am or git-cp patches from
linux-pci, but it was removed by a patch involving some other
platforms as well as a pci-core change, so I won't touch anything
else but pcie-rockchip.

Change-Id: I4268204b4c1d173a385bed8d1b6f7305bef0b5eb
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

PCI: rockchip: remove redundant platform data assignment

We add it twice, so remove one.

Change-Id: I103ee8ffcc15569d65e9455a5465ac4b7dc5112d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

PCI: rockchip: add new dev variable to indent the log

Change-Id: Idc3bf972c7ab47187b115fb1d2efe7847ee82796
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

clk: rockchip: rk3368: export SCLK_TIMERXX id for timers

Change-Id: I77fa21f29e7ff46e1bd4150845dfafe0a83b84c1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

ARM64: dts: rk3368: Update gpu opp table.

Change-Id: Id155a49d96e7533cb8c7f930c63528f452836b0e
Signed-off-by: ZhuangXiaoLiang <zhuangxl@rock-chips.com>

arm64: dts: rockchip: enable ehci/ohci and u2phy for rk3368-sheep

This adds enable ehci/ohci and u2phy configuration for rk3368-sheep.

Change-Id: Icafd7d0606ea199bdd8eac902b40459694b7f5a4
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

arm64: dts: rockchip: add vcc-host regulator for rk3368-sheep

This adds abstract vbus-host as a vcc-host regulator on rk3368-sheep.

Change-Id: I64deb38a3333346c47a5e2f499cec8d538d18baa
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

arm64: dts: rockchip: add ehci/ochi and u2phy nodes for rk3368

This adds configure ehci/ohci and u2phy nodes for rk3368 SoC.

Change-Id: I80cc311d7c14abc56084118baccf87501d44263e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

phy: rockchip-inno-usb2: add support for rk3368 SoC

This adds support host-port on rk3368 SoC and amend phy Documentation.

Change-Id: I49a2efe37aad8b34505e4dac08336dc4231f4669
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

phy: rockchip-inno-usb2: amend sm work to support legacy SoC

This adds amend logic of sm work to compatibly support some legacy SoCs,
because _host_utmi_linestate_ and _host_utmi_hostdisconnect_ GRF status
bits which are required for host sm work were not introduced in these
SoCs.

Change-Id: Ib4f499f592618930ac5016a63b7a530674aa6005
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

clk: rockchip: rk3368: add 216M and 126M for armclkb and armclkl

support 216M/126M for armclkb and armclkl

Change-Id: I047ac24ad5a176923a55bd6934f06afcf272660d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

ARM64: dts: rk3368: add vop display node

Change-Id: Ie747e90413fbfabe95e9d3c2ae55e02eff2e4708
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

phy: rockchip-inno-usb2: don't power on otg phy in ls irq handler

The commit c590056b6ab8 ("phy: rockchip-inno-usb2: usb remote
wakeup support") power on otg phy in linestate irq handler,
this will cause usb peripheral fail to connect to PC in the
following case:
1. enable otg linestate irq
2. set system enter deep sleep
3. wakeup system by power key
4. connect usb peripheral to PC, pull up D+ to ~3V, trigger
   linestate irq and power on otg phy.
5. usb peripheral do BC1.2 detect, but PC try to enumerate
   the usb peripheral at the same time and fail at last.

Actually the usb controller drivers (e.g. dwc3 driver)
and otg_sm_work can manage the otg phy power consumption, so
it doesn't need to power on otg phy in linestate irq handler.

Change-Id: Ifd78e4d44ab96f07f75f063ed20af153b4027028
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: dts: rockchip: rk3368-p9: add ramp-delay for syr82x dcdc

Change-Id: I0a1cca68d6e40a881e153f824ccbeb611d006ff0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

usb: dwc_otg_310: pcd: fix isoc in ep transfer issue

When test usb gadget uvc function, we find a isoc in
ep transfer bug that will cause uvc data transfer fail.
The error case is:

1. The current EP request is done, call complete_ep()
to completes the request, and then call start_next_request()
to check the EP request queue, in this error case, the
queue is empty, so it doesn't start next request, just
set ep frame_num to 0xFFFFFFFF.

2. NAK Interrutp is triggered, check isoc ep frame_num
is 0xFFFFFFFF, then reset the frame_num to 0, and then
call start_next_request() to check the EP request queue,
in this error case, the queue is still empty, so set ep
frame_num to 0xFFFFFFFF again.

But afer the above operation, the current code will
modify the ep frame_num in NAK Interrutp handler by
add ep bInterval to frame_num, this cause frame_num
change again, but not keep in 0xFFFFFFFF, so the next
NAK Interrutp handler doesn't start next request any
more.

This patch reset the frame_num to the current frame
number got from DSTS SOFFN register if detect the
frame_num is 0xFFFFFFFF in NAK Interrutp handler.
And modify the frame_num in NAK Interrutp handler
only when the frame_num is not 0xFFFFFFFF.

TEST=Set usb gadget as webcam, use Ubuntu Guvcview
to preview the webcam, observe the preview screen
and the error log "There are no more ISOC requests".

Change-Id: I4403a67b1d5d257d092a2a71d5666c5d6fd5af3c
Signed-off-by: William Wu <wulf@rock-chips.com>

clk: rockchip: rk3368 add 1296000 support to freq table

Change-Id: I6cff0d8820401c36c98f54a9777629dc1d37fba8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Revert "Revert "MALI: midgard: support sharing regulator with other devices""

This reverts commit eb6c2ed7207f4dd086548dd58589ed4ea042504f.

Change-Id: I09424d08bfac3457da24b10fe2b97d2856399e63
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

Revert "Revert "MALI: midgard: avoid GPU voltage domain keeping the initial voltage""

This reverts commit e7db50b51268386fd0e9f88a95c45a4ef3454c4e.

Change-Id: I47f9c1d114b06264d6dd4098bc0e00228fd8f187
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: midgard: RK: add wake_lock for delayed_work_to_power_off_gpu

To ensure that the work is executed before system being suspended.

Change-Id: Iec1bd114dfff53e2464540f09ced66cf6be81d1a
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

net: wireless: rockchip: fix compile error for rtl8822be

Fixes: 4d99f97 ("net: wireless: rockchip: add rtl8822be ...")
Change-Id: I40234ce807ef9289f422e762e2c94e163fe1824d
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>

ARM64: dts: rk3368: add rk3368-p9.dts for p9 board

Change-Id: Id7e718b4f670aa91768db695e5c38da88f048987
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

ARM64: dts: rk3368-android enable usb otg

Change-Id: Idd9e683c1c48dad940779dbb701dd4271ca8292f
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

net: wireless: rockchip: disable build rtl8822be pcie wifi by default

Until fix this compile error:
ERROR: "Array_MP_8822B_FW_NIC" [drivers/net/wireless/rockchip_wlan/rtl8822be/8822be.ko] undefined!

Change-Id: I78afda57761bb0bd7737864e5d04deeaa1b7df8a
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM64: dts: rk3368: add rk3368-sheep.dts for sheep board

rework for rk3368-tb.dtsi and rk3368-tb-sheep.dts, intergrate them
to rk3368-sheep.dts

Change-Id: Ieb9198be7c80a5c8c31b0a1990bac22079548eea
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

ARM64: dts: rk3368: Add iommu node for ISP/HEVC/VOP/VPU

Change-Id: I8193fa6f4cf186c2122b56d652f076024f517fb7
Signed-off-by: Simon <xxm@rock-chips.com>

arm64: dts: rockchip: add cpu-avs device node for rk3368

Add cpu-avs node in the device tree for the ARM64 rk3368 SoC.

Change-Id: Ie7eee09c20b06bd755b9277e0acd8eaf810c5331
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

arm64: dts: rockchip: add efuse device node for rk3368

Add a efuse node in the device tree for the ARM64 rk3368 SoC.

Change-Id: I7d13febf73e336d5b9d1046ffe6ed69d99ea9dd6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

nvmem: rockchip-efuse: add rk3368-efuse support

This adds the necessary data for handling efuse on the rk3368.
As efuse of rk3368 is secure, use secure interface to access efuse.

Change-Id: I72c29348b7744b232d75ab51c56dc7de0988c24e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: use rk3368-efuse clock ids

Reference the newly added efuse clock-ids in the clock-tree.

Change-Id: Ibbef52bcc44d006ab48e6f1f874e3bc88c681bd6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: add ids for efuse pclk on rk3368

Adds new ids for the pclk supplying the efuse on rk3368 socs.

Change-Id: I69f0daf402d62079e47d8df8f6e9bef0b274239f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

firmware: rockchip: sip: add secure register read/write

Change-Id: If1369fb63a2618d20bfe7edffdc49bd4a959f954
Signed-off-by: chenjh <chenjh@rock-chips.com>

clk: rockchip: fix up the rockchip_rk3066_pll_clk_set_by_auto func

Change-Id: Id7c561a50a16918c2943f79701ab72c6eaccdc41
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

drm/rockchip: rga: fix potential buffer overflow

Change-Id: Id923e38264855320fbe994bed156bf16eac60245
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

drm/rockchip: rga: don't flush buffer context

to save time

Change-Id: Ie4a1618eabdbb9ebf5ad0b73b8acc9df884a81bb
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM: dts: rk3288: add dma-coherent to rga

RGA are used for scale copy buffer form vpu,isp,
no need to flush CPU cache

Change-Id: Id3cfa0560a14cea122321dc1ea814aa8ec5dd4b6
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

driver, touch, gt9xx: enable regulator default

Change-Id: I6e3e7fe6102c83058078486104f88a31cdf1d65b
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

arm64: configs: rockchip_defconfig: enable mailbox and scpi

This adds select mailbox and scpi support.

Change-Id: I98fa6ee1ca210779b44c1351b68e8725071de07a
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

arm64: dts: rockchip: enable mbox related for rk3368-tb

This adds enable mbox and scpi function for rk3368-tb board.

Change-Id: I0b4866b72ad59892bc1c051c60bafd1a15ddce14
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

arm64: dts: rockchip: add mbox related nodes for rk3368

This adds support rk3368-mbox and scpi nodes for rk3368 SoC.

Change-Id: Ifdb90f8101c67ec579b5bba28f163527ed096c4c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

mailbox: rk3368: add mailbox and scpi function

Add mailbox and scpi protocol function support for rk3368 SoC.

Change-Id: I201c916865eb2729ed135c3f5a77a9dd97007952
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

video: rockchip: vcodec: fix the output buffer of jpeg

The JPEG decoder is also able to output the raw image in
NV12 format without the help of Post Processor of decoder
in VDPU1.

Change-Id: I1b29a5d93d2dd8ae2f21a7537cc3493adf57d022
Signed-off-by: Randy Li <randy.li@rock-chips.com>

soc: rockchip: add virtual poweroff support

Change-Id: I79240fa936eee3e64eb74eb5d5cdc952c3b2ac9b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

ARM64: dts: rk3399: config rockchip_suspend

Change-Id: I41e7e77b1cc903200c7e1711bae15c629a616564
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

ARM64: dts: rk3399-mid-818: enable hdmi on vopl

Change-Id: Ic42cd1895aaf0326671a30b4971c79b8ab309b4e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: rockchip_defconfig: enable CONFIG_FW_LOADER_USER_HELPER_FALLBACK

Change-Id: Ide84478567d97b53359619bd646c3d11c89e2485
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>

arm64: dts: rockchip: rk3328: Fix the saradc compitiable

The rk3328 saradc is the same as rk3399, so change the compitiable,
they are both 6 channels.

Change-Id: Ia6104e8c5c3590cc745792b8cd3a457a15bb53d2
Signed-off-by: David Wu <david.wu@rock-chips.com>

arm64: dts: rockchip: rk3328: remove the gmac m0 pins

The RK3328 datasheet is not define the pins of gmac m0,
so remove them.

Change-Id: Ic537586c76bd2f3a937c1e15b5877744598cc702
Signed-off-by: David Wu <david.wu@rock-chips.com>

arm64: dts: rockchip: rk3328: Use new define for RK3328 pins

Change-Id: I33ba7d3ae0fd93e94fe661936d90f2100f478205
Signed-off-by: David Wu <david.wu@rock-chips.com>

include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl

Add gpio pin index definition to make it easier to describe
GPIO in dts.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I4aa6c01f96d91fd8ddcb371fd01ca9629f1a3013