ARM64: dts: rk3368: add vop display node

Change-Id: Ie747e90413fbfabe95e9d3c2ae55e02eff2e4708
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 1d26f1b1aa34b4c2bb67c296a8e8ef3199576c45..c5eeb170b640bd05725ef9fce13c99923ab4e307 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -985,6 +985,30 @@
                status = "disabled";
        };
 
+       vop: vop@ff930000 {
+               compatible = "rockchip,rk3368-vop";
+               reg = <0x0 0xff930000 0x0 0x2fc>;
+               interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
+               reset-names = "axi", "ahb", "dclk";
+               power-domains = <&power RK3368_PD_VIO>;
+               iommus = <&vop_mmu>;
+               status = "disabled";
+
+               vop_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
+       display_subsystem: display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+               status = "disabled";
+       };
+
        vop_mmu: iommu@ff930300 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff930300 0x0 0x100>;