ASoC: rockchip: hdmi_dp: add support for 192k

Change-Id: Ib50106f9c44ef86f2e20cf2b2206b54c8c966a29
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ASoC: rockchip: i2s: increase dma maxburst to 16

Change-Id: I84898fced94141b29e88f2e8f8f9328881090c25
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

drm: bridge: dw-hdmi: optimize edid reading process

1.change SDA high level holding time to 3us.
2.when plug in,add timer to avoid unstable state.

Change-Id: Idc6faec710137ac9f8e589d75cbc1b85f7a45faf
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

arm64: dts: rk3399-mid: rk818 enabled boost_otg fix ota vcc5v poweroff when susppend

Change-Id: I2d11a76a21d7a8fe18124312c68b744f4364f4fd
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

arm64: dts: rk3368: rk818 enabled boost_otg fix ota vcc5v poweroff when susppend

Change-Id: I0626a47da5487d34c0701d2b21cfab5b9b3fb425
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

arm64: dts: rockchip: add L2 cache node for rk3368

This patch adds the L2 cache topology on RK3368.
RK3368 has two clusters, each cluster has its own L2 cache.

Change-Id: Ibee5a39889d4924e439c9b0c249df052f63e9242
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: dts: rockchip: remove unneeded idle-states for rk3368

ATF and Linux support system suspend, so we don't need define
idle-states to support suspend. RK3368 don't support any
idle state other then WFI. Just remove it.

Change-Id: Ifa95862b4998287560cd2214ff6b5763a9d6ce02
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm: configs: enable some touchscreen driver

Change-Id: I44cc2ef0a230dea6c60cddf2e6aa7195985468ed
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm: configs: linux: enable wifi load driver when boot kernel

if we don't enable it, driver init order might be wrong

Change-Id: I0d75b6fcdb762a77f8c27111da642cdba255fc4e
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

drm/sysfs: fix up memory leak problem

Change-Id: I2b4617412b0d5b2897c3cce2ef612a11a9762ba2
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

arm: dts: rockchip: update thermal config for rk3288

add cpus' dynamic power coefficient. rename the thermal zone's config
and make it more readable. update temperature pooling interval and
make the temperature control more effective.

Change-Id: I75d21601b7e3f41a32d10bbcbb1fa9b47ed7da0f
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

arm64: dts: rockchip: add tsadc's working clock rate for rk3288

add tsadc's working clock rate for rk3288. if not set, tsadc
will work at the default rate of 1k hz.

Change-Id: I1b26351c3fb97f5ceb4657c2356c2f5649ad140c
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

ARM64: dts: rockchip: rk3399: set dummy_cpll and dummy_vpll as fixed clk

to fix up :
[    0.000000] clk: couldn't get clock 4 for /clock-controller@ff760000
[    0.000000] rockchip_clk_of_add_provider: could not register clk provider
The cause of the error:
struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
     const char *con_id, bool with_orphans)
{
/* This is to allow this function to be chained to others */
if (!hw || IS_ERR(hw))
return (struct clk *) hw;

if (hw->core->orphan && !with_orphans)
return ERR_PTR(-EPROBE_DEFER);

return clk_hw_create_clk(hw, dev_id, con_id);
}
if clk is orphan and not have the with_orphans flag, it will
register clk provider failed.

Change-Id: I87ca9ec087611a5425545bfc857b09d8438218b5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: defer clk_gets on orphan clocks

Orphan clocks or children of orphan clocks don't have rate information at
all and can produce strange results if they're allowed to be used and the
parent becomes available later on.

This change, based on one from Stephen Boyd, defers __clk_create_clk()
calls on orphan clocks in all regular cases.

One special case that gets handled, is accessing such orphan clocks when
handling assigned-clocks configurations. In the boot-defaults it may be
the case that a clock is connected to an orphan parent which then might
be needed to get reparented to an actually usable clock using
assigned-clock-parents. In this case even orphaned clocks should be
usable, but only for the set-parent case.

The added of_clk_get_from_provider_with_orphans() is only available
to ccf internal parts to prevent abuse.

(am from https://patchwork.kernel.org/patch/7690221/)

Change-Id: I2e603dab191fa8a431adebad1f9d482d52b7deeb
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: rk3368: revert xin32k use the fixed clk

This reverts commit 61e585b9ef7f0aa9bce9f004771becda795aa563.

Change-Id: Id46aa6bf2822c1b9e53de544b349b42645cb6a5a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: add gsl3680 and mpu6050 for RK3399 Firefly Board

Change-Id: I8e6f4802d4c1b10873c655cc620e6d7be47efee7
Signed-off-by: hero.huang <hero.huang@rock-chips.com>

clk: rockchip: rk3288: fix up the clk register for hclk_vio

Change-Id: If07e27b1f88974fa0dcb2c8f719df6ba3c35dbcd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: add ACLK_VIO0\1 HCLK_VIO id for rk3288 vio

Add the needed id for the vio clock.

Change-Id: I2c4009d8214e1560da1213f224610882c2cd06e7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

ARM64: dts: rockchip: add cpuinfo support for rk3328

Change-Id: Iaaa400c09c2fb7c0d5e96fa4217065fa14066fc1
Signed-off-by: Chen Liang <cl@rock-chips.com>

arm64: dts: rockchip: add efuse device node for rk3328

Add a efuse node in the device tree for the ARM64 rk3328 SoC.

Change-Id: I8610ae9e06131f042681edf68432485e8a35832f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

nvmem: rockchip-efuse: add support for rk3328-efuse

This adds the necessary data for handling efuse on the rk3328.

Change-Id: Ica66635977163f380b7d96d73d3a2423d1e08298
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

nvmem: rockchip-efuse: add optional property to get efuse size

The exact efuse size is defined in property <reg> before, this assume
that the length of registers is equal to efuse size, but it not true
for some chips, so we need anothor property to redefine efuse size.

Change-Id: I9cdab8adc2a13b55cfcacc3c2248295c4387a806
Signed-off-by: Chen Liang <cl@rock-chips.com>

arm: dts: rk3288-evb-rk818: fix tshut prority to HIGH

Depends on hardware design, the PWR_HOLD should be high
for board with rk818 pmic.

Change-Id: Ib18f530d435f08ac98fbf6a9481eb483b7fadece
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm: dts: rk3288-evb-rk818: fix 32k out to xin32k

Change-Id: Ib4f0925e0b801d993bb76f1c7e9287b2b60fb919
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

usb: dwc_otg_310: fix usb vbus power controlled by pmic

On rockchip platforms, usb vbus 5V can be controlled by
gpio or pmic while otg work as host mode. If vbus 5v is
supplied from pmic, and usb charger circuit also connect
to pmic, we need to ensure usb vbus is disconnected from
external power source (e.g. PC or USB adapter) before
power on vbus 5v from pmic, otherwise, the pmic may be
broken by the external power. It always happens with rk816
which support usb charge and usb vbus power function.

With this patch, if we use pmic for usb vbus 5v,  it needs
to add a new property 'rockchip,usb-pmic-vbus' in dts usb
node, like this:

&usb0 {
rockchip,usb-pmic-vbus;
};

Change-Id: I1055f637e77fb5dd681994ff440293a6682b2a12
Signed-off-by: William Wu <wulf@rock-chips.com>

arm: dts: rk3288: add mipi support

if want enable mipi,
you should to okay mipi_dsi, dsi_panel and route_mipi.
also you should to disabled edp, edp_phy and edp_panel.

Change-Id: I037cb76c7a1d08bcd09219072aeb359e0d460a1c
Signed-off-by: xubilv <xbl@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm: dts: rk3288-evb: modify panel to edp_panel

Change-Id: I5a62c8fa933e9852d88646411d13e67075d63b02
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm: dts: rk3288-evb-act8846: add power supply for eDP

Change-Id: I3928b44d91c2135c854460317f73ef8857c8ccd4
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

arm64: dts: rockchip: rk3368: add latency-bound property

add latency-bound property to ease user's config and debugging

Change-Id: I76fd2945e4fdecf251ea2f4b15bd6e90fd154145
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

thermal: rockchip: rk3368: ajust tsadc's data path according request of qos

we dynamically ajust data path according to request of qos to do
the balance between system's performance and tsadc's precision.

Change-Id: Iec6d6af6efce3932f894d9a07298daa9653cc87e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

usb: dwc3: rockchip: fix possible circular deadlock

This patch aims to fix possible unsafe locking scenario when
dwc3 probe failed. The possible deadlock warning info is:

[4.254320] ======================================================
[4.254327] [ INFO: possible circular locking dependency detected ]
[4.254334] 4.4.55 #20 Not tainted
[4.254339] -------------------------------------------------------
[4.254346] kworker/4:1/47 is trying to acquire lock:
[4.254352]  (&rockchip->lock){+.+.+.}, at: [<ffffff8008730d58>] dwc3_rockchip_otg_extcon_evt_work+0x30/0x42c
[4.254382]
[4.254382] but task is already holding lock:
[4.254388]  ((&rockchip->otg_work)){+.+...}, at: [<ffffff80080b7a78>] process_one_work+0x1c4/0x6ac
[4.254411]
[4.254411] which lock already depends on the new lock.
[4.254411]
[4.254418]
[4.254418] the existing dependency chain (in reverse order) is:
[4.254424]
-> #1 ((&rockchip->otg_work)){+.+...}:
[4.254440]        [<ffffff80080f6a58>] __lock_acquire+0x15b4/0x1950
[4.254452]        [<ffffff80080f75fc>] lock_acquire+0x190/0x250
[4.254461]        [<ffffff80080b88c8>] flush_work+0x4c/0x274
[4.254471]        [<ffffff80080b8cd8>] __cancel_work_timer+0x130/0x1c0
[4.254480]        [<ffffff80080b8d78>] cancel_work_sync+0x10/0x18
[4.254489]        [<ffffff8008731648>] dwc3_rockchip_probe+0x4f4/0x59c
[4.254498]        [<ffffff8008525a9c>] platform_drv_probe+0x58/0xa4
[4.254509]        [<ffffff800852397c>] driver_probe_device+0x118/0x2b0
[4.254521]        [<ffffff8008523b80>] __driver_attach+0x6c/0x98
[4.254531]        [<ffffff80085229d8>] bus_for_each_dev+0x80/0xb0
[4.254543]        [<ffffff80085234b0>] driver_attach+0x20/0x28
[4.254554]        [<ffffff8008523040>] bus_add_driver+0xe8/0x1ec
[4.254565]        [<ffffff8008524a9c>] driver_register+0x94/0xe0
[4.254576]        [<ffffff80085259f4>] __platform_driver_register+0x48/0x50
[4.254585]        [<ffffff8009130bf4>] dwc3_rockchip_driver_init+0x18/0x20
[4.254598]        [<ffffff8008082ba8>] do_one_initcall+0x180/0x19c
[4.254609]        [<ffffff8009100e58>] kernel_init_freeable+0x208/0x2c0
[4.254621]        [<ffffff8008c00748>] kernel_init+0x10/0xf8
[4.254632]        [<ffffff80080826d0>] ret_from_fork+0x10/0x40
[4.254641]
-> #0 (&rockchip->lock){+.+.+.}:
[4.254656]        [<ffffff80080f3af8>] print_circular_bug+0x64/0x2c4
[4.254666]        [<ffffff80080f6728>] __lock_acquire+0x1284/0x1950
[4.254675]        [<ffffff80080f75fc>] lock_acquire+0x190/0x250
[4.254685]        [<ffffff8008c03aac>] mutex_lock_nested+0x80/0x3d0
[4.254695]        [<ffffff8008730d58>] dwc3_rockchip_otg_extcon_evt_work+0x30/0x42c
[4.254704]        [<ffffff80080b7bec>] process_one_work+0x338/0x6ac
[4.254714]        [<ffffff80080b90e8>] worker_thread+0x300/0x428
[4.254723]        [<ffffff80080bead8>] kthread+0xf4/0xfc
[4.254732]        [<ffffff80080826d0>] ret_from_fork+0x10/0x40
[4.254741]
[4.254741] other info that might help us debug this:
[4.254741]
[4.254749]  Possible unsafe locking scenario:
[4.254749]
[4.254755]        CPU0                    CPU1
[4.254760]        ----                    ----
[4.254765]   lock((&rockchip->otg_work));
[4.254775]                                lock(&rockchip->lock);
[4.254786]                                lock((&rockchip->otg_work));
[4.254796]   lock(&rockchip->lock);
[4.254805]
[4.254805]  *** DEADLOCK ***
[4.254805]
[4.254813] 2 locks held by kworker/4:1/47:
[4.254818]  #0:  ("events"){.+.+.+}, at: [<ffffff80080b7a78>] process_one_work+0x1c4/0x6ac
[4.254839]  #1:  ((&rockchip->otg_work)){+.+...}, at: [<ffffff80080b7a78>] process_one_work+0x1c4/0x6ac
[4.254860]
[4.254860] stack backtrace:
[4.254869] CPU: 4 PID: 47 Comm: kworker/4:1 Not tainted 4.4.55 #20
[4.254875] Hardware name: Rockchip RK3399 Evaluation Board v3 (Android) (DT)
[4.254885] Workqueue: events dwc3_rockchip_otg_extcon_evt_work
[4.254893] Call trace:
[4.254902] [<ffffff8008088a1c>] dump_backtrace+0x0/0x1c8
[4.254909] [<ffffff8008088bf8>] show_stack+0x14/0x1c
[4.254917] [<ffffff80083a5fa0>] dump_stack+0xb0/0xec
[4.254925] [<ffffff80080f3d3c>] print_circular_bug+0x2a8/0x2c4
[4.254931] [<ffffff80080f6728>] __lock_acquire+0x1284/0x1950
[4.254938] [<ffffff80080f75fc>] lock_acquire+0x190/0x250
[4.254946] [<ffffff8008c03aac>] mutex_lock_nested+0x80/0x3d0
[4.254952] [<ffffff8008730d58>] dwc3_rockchip_otg_extcon_evt_work+0x30/0x42c
[4.254960] [<ffffff80080b7bec>] process_one_work+0x338/0x6ac
[4.254967] [<ffffff80080b90e8>] worker_thread+0x300/0x428
[4.254973] [<ffffff80080bead8>] kthread+0xf4/0xfc
[4.254979] [<ffffff80080826d0>] ret_from_fork+0x10/0x40
[4.275124] rockchip-dwc3 usb@fe800000: USB peripheral connected

Change-Id: I9d34724e1c2af9b8472f79bfe4b088cbdde6394d
Signed-off-by: William Wu <wulf@rock-chips.com>

arm: dts: rk3288-android: add fiq-debugger support

Use irq mode for rk3288 fiq-debugger.

Change-Id: I15a5b5ac45a4f20811f97249dae77e86402f4cec
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

video/rockchip: rga2: force rga version if hardware not support

Change-Id: I95323b5f46228561266b2352815f0d15851fa6ce
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm: dts: rk3288-android: add pstore support

Reserved memory start from 128M for pstore.

Change-Id: Ie61103004c4f0a7e20f3900db3c44905f7b92955
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

arm64: dts: rk3399-box-rev2: add hdmi phy config table

Change-Id: Id4a9c97c9cfba977a521d86e1ba438d8be6945d6
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

drm/rockchip: dw_hdmi-rockchip: get phy config from dts

Change-Id: I6903f3b9498be32f9d4936beb2d6d2aa5db43d09
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

arm64: dts: rockchip: remove device out of board for RK3399 Firefly

Change-Id: I53b7ac3716dc4b005caaba7b8eb6838afa6d0c46
Signed-off-by: hero.huang <hero.huang@rock-chips.com>

arm64: dts: rockchip: update isp-flash gpio for rk3399-android-6.0

Change-Id: If4bcebe0022d0bb3d46cdb1858340082bb16b404
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

arm64: dts: rockchip: update isp-flash gpio for rk3399-android

Change-Id: I43138294c6171077fd8800b465cd07996c12f57d
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

arm: dts: rk3288-evb: 32.768K clk node for BT

Change-Id: Id7da26efcf59c4b1e3dc82190d7fe58854a29ee4
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>

clk: rockchip: rk3328: add pclk for acodec

Change-Id: Ia07f22997875e874037cb06fea6a3f25e6ab46dc
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

dt-bindings: clock: rk3328: add pclk_acodec id

Change-Id: I3b0e2d2da5f919ed88f599823784aefa5e9a330c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

dt-bindings: clock: rk3328: fixup HCLK_I2S1 id

Change-Id: I40e6543988e1c1a0cbb475eacbb5f3f985da55e7
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

arm64: dts: rockchip: rk3368: init aclk_cci_pre 576M

Change-Id: Ieb53a2e3e777a5f478a0475a72dcd9c1d39ec2dc
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3368: add aclk_cci_pre ID

Change-Id: I855e79023a9e244c2db37af88a075a4ef4c36aec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rk3328-evb: enable fiq mode

Change-Id: Ic0f6f95488b6575ebb9c4466fd43bf14f7214210
Signed-off-by: chenjh <chenjh@rock-chips.com>

arm64: dts: rockchip: Add reset property for rk3368 mipi

Change-Id: I12a3bf9cdd61c6da3d0675d68d4ffd9bbfd9ffd8
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

arm: rockchip: remove setting for rk timer

Change-Id: I74200f86a5fe3cc023282b7b0e452826554dd102
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

arm: dts: rk3288-android: add nand support

Change-Id: I26ba461f04b79a6e86abe2998aafea00a2e367c3
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

drm/panel: add support for Sharp F402 2048x1536 panel

dt-bindings: consolidate display related bindings

Change-Id: I92788135d110b44185d93f3a5a54d800b4d55a1c
Signed-off-by: hero.huang <hero.huang@rock-chips.com>

phy: rockchip-inno-mipi-dphy: fix code style and removed unneeded code

Change-Id: I28803c6064705baa05786cfcd817dd6f02464dcf
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

phy: rockchip-inno-mipi-dphy: use phy_set_bus_width() to set the lane mbps

We use phy_set_bus_width() to set the lane rate that the PHY supports.
The controller driver may then use phy_get_bus_width() to fetch the
PHY lane rate in order to properly configure the controller.

Change-Id: I116f0d82ad187806914c0d566eab92b922f143ef
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

drm/rockchip: dw-mipi: use phy_get_bus_width to fetch the lane_mbps for rk3368

1) If using the third part PHY, we use phy_get_bus_width() to fetch the
PHY lane rate in order to properly configure the controller.
2) Removed unneeded code.

Change-Id: I5c245e65f58665aa5fc025d6579e8bb331554458
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

phy: rockchip-inno-mipi-dphy: Add reset control for PHY APB

Change-Id: I02915f0c5a291a1aa13c7e3ed45421667a19940d
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

drm/rockchip: dw-mipi: Add reset control for APB

Change-Id: I740b5f6311bfaa6303870ef726be3b1a42b7c4d7
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

input: touchscreen: add touch screen of gslx680 for rk3399-firefly-edp

Change-Id: Ic4fa205f8f71353c4703d745e96ec9056181c198
Signed-off-by: hero.huang <hero.huang@rock-chips.com>

PM / devfreq: rk3399_dmc: rename driver and internals to rockchip

In future it will be modified to support more rockchip platforms.

Change-Id: I5cd7ce555eefe08b12fbfcda8ef445c4b169e8c6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

PM / devfreq: rk3399_dmc: remove unused variable and fix code style

Change-Id: If1a49276430d2ef9dd77cadc7248096ec2ef0d17
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

PM / devfreq: rk3399_dmc: initialize min_freq and max_freq

In order to get correct results from sysfs, e.g.:
cat /sys/class/devfreq/dmc/min_freq
cat /sys/class/devfreq/dmc/max_freq

Change-Id: Id5921fdbacd0977c0b5378ccf0de068f0195b557
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

ARM: rockchip_defconfig: enable ROCKCHIP_CPUINFO

Change-Id: I984c81243ff9ecbafdc242b8a8dae0bba41a2d49
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip_defconfig: enable ROCKCHIP_CPUINFO

Change-Id: Ib66c2ae82d1b84fb82cb87db418c5ef228437878
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: dts: rockchip: add cpuinfo support for rk3399-android

Change-Id: I0eba0017a88added1a84f9c3add1705d8079cd00
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

soc: rockchip: add cpuinfo support

Set system_serial_low/high from eFuse ID.
Serial can read from /proc/cpuinfo.

Change-Id: If412fc5a89a5e5092b510452fc5a126fdd374ac2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm: dts: rk3288-android: use secure efuse

Use a new compatible to match secure interface
when kernel is in no-secure mode.

Change-Id: I3994b2c86bb9e221f102766c2d1a341930628b5d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

nvmem: rockchip-efuse: add support for rk3288 secure efuse

This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.

Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

arm: dts: rk3288-evb: support board with rk818

Change-Id: Iea8b91289c335be8c8f620430837ccf42776abf5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: rockchip_linux_defconfig: disable CONFIG_MALI400_DEBUG

Change-Id: I0fb379772f2f4d99a17439760fe997d0f5ab1eef
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

net: wireless: rockchip_wlan: update for ap6xxx wifi driver

fix compile warning when CONFIG_DEBUG_SECTION_MISMATCH=y

Change-Id: Iada73b82feed96279fed588adc4cbe47bd6be8f0
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>

clk: rockchip: optimizing ddrclk_scpi_recalc_rate behavior

Cat ddr frequency from rockchip_ddrclk_scpi_set_rate prior to
rockchip_ddrclk_scpi_recalc_rate, to optimizing running time and reduce
SCPI APIs usage rate.

Change-Id: Iba31d33a5920816b1cc230f639ea3a9503d451c8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

soc: rockchip: scpi: add new function for rk3368

1. amend return frequency for scpi_ddr_set_clk_rate.
2. add scpi_ddr_dclk_mode function for rk3368.

Change-Id: I0f3c42d74e34ccb740f2a9e68ef12bba98b7aab7
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

PM / devfreq: rk3399_dmc: rename of_get_opp_table

The function doesn't get something from dts, it is more appropriate to
rename of_get_opp_table to rk3399_dmcfreq_init_freq_table.

Change-Id: I8c4994d45ff4d0654d034483e091bbb225a1ea61
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

PM / devfreq: event: add support for rk3368 dfi

This adds the necessary data for handling dfi on the rk3368.
Access the dfi via registers provided by GRF (general register
files) module.

Change-Id: I96c2b4dcd34d90731b749ebdbe6922f01559d8e6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

drm/sysfs: add audioformat to sysfs

Change-Id: Iccce2de5dc90ceabd1db7127d8ae53ef849af4c8
Signed-off-by: algea.cao <algea.cao@rock-chips.com>

arm64: cpuinfo: add system serial support

Change-Id: I4542f07226e47e67be1f2792cffaa71fd6401442
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

clk: rockchip: rk3368: add ddrc clock support

Add a ddrc clock into clk branches, so we can do ddr frequency
scaling on rk3368 platform in future.

Change-Id: Ie7fd2e8d8bdf8b9ff843ca13e848f772adaa109a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: support setting ddr clock via SCPI APIs

On rk3368, let a mcu scaling ddr clock via SCPI (System Control and
Power Interface) APIs.

Change-Id: I95342b876caad991e6d1319c5e4ec793365c7981
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

drm/rockchip: vop: support CRTC_STEREO_DOUBLE mode

Change-Id: Ic9905248491a2d728da782d6cfa9679ca50dd6c4
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: vop: use crtc_[h/v]display for vop

Change-Id: I1c1263accd419bb790ddb19da9323aaab8b9338e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

net: wireless: rockchip_wlan: add rtl8723cs support

update rtl8723cs wifi driver to version v5.2.1_21569.20170329_COEX20170214-1500

Change-Id: Iee0c342b4fb44a30be0004a2dcee40dea5e67269
Signed-off-by: zzc <zzc@rock-chips.com>

arm64: rockchip_defconfig: enable CONFIG_FIQ_DEBUGGER_TRUST_ZONE

Change-Id: Id726ec446724de7176717d7ef37861dbea69be1c
Signed-off-by: chenjh <chenjh@rock-chips.com>

fiq_debugger: merge from linux 3.10

update some features:
1. rename sip smc function name;
2. add serial hw irq and phyical base address parse;
3. use FIQ_DEBUGGER_TRUST_ZONE for armv7 and armv8.

Change-Id: I920899f30cadf1ec8380a2e70f5d1e0e801ec5c2
Signed-off-by: chenjh <chenjh@rock-chips.com>

firmware: rockchip: update sip interface

clean up code and add support for fiq debugger

Change-Id: I6dc0e4306a8554c49342207191005e55fb662b38
Signed-off-by: chenjh <chenjh@rock-chips.com>

soc: rockchip: fixed compilation error

This adds fixed below errors when compiled rockchip_defconfig without
CONFIG_RK3368_SCPI_PROTOCOL select:

In file included from drivers/clk/rockchip/clk-ddr.c:23:0:
include/soc/rockchip/scpi.h:89:12: warning:
'scpi_sys_set_jtagmux_on_off' defined but not used [-Wunused-function]
error, forbidden warning: scpi.h:89
scripts/Makefile.build:258: recipe for target
'drivers/clk/rockchip/clk-ddr.o' failed
make[3]: *** [drivers/clk/rockchip/clk-ddr.o] Error 1

Change-Id: I5abc184554dcfc3697be82aede8dec27da2fcdd9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

firmware: psci: remove fiq enable after cpu_suspend

Change-Id: I2fb6cd70ed462eb5abc36be790008daa134810d6
Signed-off-by: chenjh <chenjh@rock-chips.com>

rk_fiq_debugger: map signal irq for fiq mode

Change-Id: I220067fa3b6efaf4a1e88208a596822fc7120376
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

fiq_debugger: add CONFIG_FIQ_DEBUGGER_EL3_TO_EL1 for arm v8

Change-Id: I6aecf2c7017c3e153d88fe33207f75510051d75c
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

irqchip/gicv2/3: add gic_retrigger

Change-Id: Ic87d4936317fb598c04e3ccc56a850c0c9e4e6ba
Signed-off-by: chenjh <chenjh@rock-chips.com>

ARM64: dts: rk3328-evb: enable gpu device

And set its regulator.

Change-Id: I0703ee39059a5d63a5bc259cfc66ca6203819015
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

arm64: rockchip_defconfig: enable MALI450

Change-Id: I8b6d073da859ac064b2c641539b49104393df2e9
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

arm64: rockchip_linux_defconfig: enable MALI450

Change-Id: I914e4c341f096107def5f76621f9b82ee1f94fe7
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

ARM64: dts: rk3328: add mali-450 GPU device

GPU and DDR share vdd_logic.
DDR DVFS is not ready yet, to ensure DDR could work stably,
vdd_logic(vdd_gpu) should be higher than 1.05V.
This would be optimized after DDR DVFS is ready.

Change-Id: I2749484c7f6f86dde850f0f85d606e1c1ab85c17
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: RK: reconstruct platform specific code for devfreq DVFS

Change-Id: I1ddf7be0868fb885784098c14feb16634d76dcd9
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: upgrade DDK to r7p0-00rel0

Change-Id: Ia1dc7b104a7bbb743e46d25e2c434e92c5596353
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: upgrade DDK to r6p1-01rel0

Change-Id: I88e8aba740ec223c1107def64eb004390b7fd940
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: RK: remove core_scaling in "platform specific code"

DDK integrate_guide says
"not to use core_scaling on r5p0-01rel0 and later."

Change-Id: Ibb3eddac75548bb9f6763dc4dc9bad540746191f
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: RK: use late_initcall_sync instead of module_init

Some dependences of mali device driver should be initialized first.

Change-Id: I76f1d8b029345801bf0a68266889ec1c5a28b524
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: utgard: RK: fix compile errors under arm64

Change-Id: I88df540e9822f148703aa07f74fbea59fbbf3350
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

arm: dts: rockchip: rk3288-android delete rk timer

Change-Id: Icf045a05ea07c735200d1a54aa7b2576ada82609
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: rockchip_linux_defconfig: enable CONFIG_USB_UAS

Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.

Change-Id: I67ce5cdb821413d3c4d018be31c892d20d831470
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: rockchip_defconfig: enable CONFIG_USB_UAS

Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.

Change-Id: I69e10d3f55c03c411cd9efcef9a7fd9f8ccb9a53
Signed-off-by: William Wu <wulf@rock-chips.com>