hjc [Fri, 9 Jan 2015 06:44:04 +0000 (14:44 +0800)]
rk3368 lcdc: add CABC mode config
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Fri, 9 Jan 2015 06:36:17 +0000 (14:36 +0800)]
dtsi: add cabc lut config for sdk lvds/edp screen
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Tue, 6 Jan 2015 03:42:55 +0000 (11:42 +0800)]
rk3368 lcdc: update for vop mmu config. lcdc driver don't to config mmu reg, it will cause unknow error. just like when lcdc do reg_restore will config 0x0 to 0x308, this is mmu cmd to active mmu paging.
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Mon, 12 Jan 2015 07:57:54 +0000 (15:57 +0800)]
rk3368 lcdc: check win2 win3 mutile area config
Signed-off-by: hjc <hjc@rock-chips.com>
dkl [Thu, 8 Jan 2015 03:37:44 +0000 (11:37 +0800)]
clk: rk3368: add clk_pll_ops_3368_low_jitter and modify dclk_lcdc ops
In order to provide low jitter dclk_lcdc for dislay(especially HDMI),
we neeed to set dclk_lcdc's src pll with max VCO. Thus we add
clk_pll_ops_3368_low_jitter type pll to get pll low jitter setting
from a table. Also dclk_lcdc ops in rk3368 is modifided to get best
parent rate from a table firstly, or caculate a parent rate if not
found in the table.
Signed-off-by: dkl <dkl@rock-chips.com>
David Wu [Thu, 8 Jan 2015 12:58:15 +0000 (20:58 +0800)]
rk3368: add extra name for grf,sgrf,pmu-grf syscon node
Signed-off-by: David Wu <wdc@rock-chips.com>
CMY [Wed, 7 Jan 2015 07:42:54 +0000 (15:42 +0800)]
ARM64: ion: ION_IOC_GET_PHYS compat 32bit userspace app.
Signed-off-by: CMY <cmy@rock-chips.com>
Huang, Tao [Wed, 7 Jan 2015 06:38:57 +0000 (14:38 +0800)]
video: rockchip: iep: covert dsb() to dsb(sy)
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Wed, 7 Jan 2015 06:30:39 +0000 (14:30 +0800)]
Merge branch develop-3.10
Huang, Tao [Wed, 7 Jan 2015 06:30:32 +0000 (14:30 +0800)]
Revert "video: rockchip: iep: covert dsb() to dsb(sy)"
This reverts commit
0956ae5f32a5c5e1a29ad85899444d9fdc9c53a7.
Huang, Tao [Wed, 7 Jan 2015 06:21:55 +0000 (14:21 +0800)]
rk29_wdt: fromdos only
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
smj [Wed, 7 Jan 2015 05:56:25 +0000 (13:56 +0800)]
rk3128 : remove cif sensor include for box dts
Signed-off-by: hjh <hjh@rock-chips.com>
chenzhen [Wed, 7 Jan 2015 06:13:36 +0000 (14:13 +0800)]
rk312x, mali_400_driver : support mali_so to get rk_ko_ver from mali_ko.
Alpha Lin [Wed, 7 Jan 2015 03:24:42 +0000 (11:24 +0800)]
IEP: Coding Style revision according to K-R style.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
Alpha Lin [Wed, 7 Jan 2015 01:57:43 +0000 (09:57 +0800)]
VPU, fix undefined reference to `syscon_regmap_lookup_by_phandle'.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
chenzhen [Wed, 7 Jan 2015 01:42:29 +0000 (09:42 +0800)]
rk312x, mali_400_driver :
Integrate arm_release_ver r5p0-01rel0;
Modify resource init code to run with 'dts_for_mali_ko_befor_r5p0'.
Alpha Lin [Wed, 7 Jan 2015 01:29:18 +0000 (09:29 +0800)]
VPU, Disable iommu when decoding failure
Disable iommu when decoding failure, so the iommu could
restore its state when the decoding resume.
Without this step, iommu will work in invalid state.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
cl [Tue, 6 Jan 2015 13:40:32 +0000 (21:40 +0800)]
<4>[ 4109.549711] CPU: 0 PID: 125 Comm: ddrfreqd Not tainted 3.10.0 #136
<4>[ 4109.549723] [<
c0013e24>] (unwind_backtrace+0x0/0xe0) from [<
c001172c>] (show_stack+0x10/0x14)
<4>[ 4109.549737] [<
c001172c>] (show_stack+0x10/0x14) from [<
c0032408>] (warn_slowpath_common+0x4c/0x68)
<4>[ 4109.549750] [<
c0032408>] (warn_slowpath_common+0x4c/0x68) from [<
c00324a4>] (warn_slowpath_fmt+0x2c/0x3c)
<4>[ 4109.549762] [<
c00324a4>] (warn_slowpath_fmt+0x2c/0x3c) from [<
c009899c>] (watchdog_check_hardlockup_other_cpu+0xd0/0xf8)
<4>[ 4109.549778] [<
c009899c>] (watchdog_check_hardlockup_other_cpu+0xd0/0xf8) from [<
c00989fc>] (watchdog_timer_fn+0x38/0x168)
<4>[ 4109.549793] [<
c00989fc>] (watchdog_timer_fn+0x38/0x168) from [<
c0054c7c>] (__run_hrtimer+0x1a4/0x2b8)
<4>[ 4109.549807] [<
c0054c7c>] (__run_hrtimer+0x1a4/0x2b8) from [<
c005587c>] (hrtimer_interrupt+0x11c/0x278)
<4>[ 4109.549830] [<
c005587c>] (hrtimer_interrupt+0x11c/0x278) from [<
c056b65c>] (arch_timer_handler_phys+0x28/0x30)
<4>[ 4109.549846] [<
c056b65c>] (arch_timer_handler_phys+0x28/0x30) from [<
c009c3a4>] (handle_percpu_devid_irq+0xf8/0x1b4)
<4>[ 4109.549861] [<
c009c3a4>] (handle_percpu_devid_irq+0xf8/0x1b4) from [<
c0098fa4>] (generic_handle_irq+0x20/0x30)
<4>[ 4109.549872] [<
c0098fa4>] (generic_handle_irq+0x20/0x30) from [<
c000e3ac>] (handle_IRQ+0x64/0x8c)
<4>[ 4109.549883] [<
c000e3ac>] (handle_IRQ+0x64/0x8c) from [<
c0008538>] (gic_handle_irq+0x34/0x58)
<4>[ 4109.549893] [<
c0008538>] (gic_handle_irq+0x34/0x58) from [<
c000d600>] (__irq_svc+0x40/0x70)
<4>[ 4109.549901] Exception stack(0xed0addd8 to 0xed0ade20)
<4>[ 4109.549910] ddc0:
00000003 00000000
<4>[ 4109.549920] dde0:
00000003 c0c5bff3 c0c5bff0 c0c5bff0 547b152f 000003c8 00000000 c0b8446c
<4>[ 4109.549930] de00:
ed0ade48 83126e97 00000003 ed0ade20 c0023638 c00235ec 600f0113 ffffffff
<4>[ 4109.549941] [<
c000d600>] (__irq_svc+0x40/0x70) from [<
c00235ec>] (call_with_single_cpu.isra.4+0x9c/0x154)
<4>[ 4109.549952] [<
c00235ec>] (call_with_single_cpu.isra.4+0x9c/0x154) from [<
c0023820>] (_ddr_change_freq+0x17c/0x1c0)
<4>[ 4109.549963] [<
c0023820>] (_ddr_change_freq+0x17c/0x1c0) from [<
c0025088>] (ddrfreq_scale_rate_for_dvfs+0x20/0x74)
<4>[ 4109.549978] [<
c0025088>] (ddrfreq_scale_rate_for_dvfs+0x20/0x74) from [<
c002937c>] (dvfs_target+0x15c/0x204)
<4>[ 4109.549993] [<
c002937c>] (dvfs_target+0x15c/0x204) from [<
c0027d70>] (dvfs_clk_set_rate+0x44/0x80)
<4>[ 4109.550007] [<
c0027d70>] (dvfs_clk_set_rate+0x44/0x80) from [<
c00252a0>] (ddrfreq_mode.part.3+0x40/0xec)
<4>[ 4109.550017] [<
c00252a0>] (ddrfreq_mode.part.3+0x40/0xec) from [<
c00257c0>] (ddrfreq_work+0x184/0x1d4)
<4>[ 4109.550029] [<
c00257c0>] (ddrfreq_work+0x184/0x1d4) from [<
c0025868>] (ddrfreq_task+0x58/0x1b8)
<4>[ 4109.550041] [<
c0025868>] (ddrfreq_task+0x58/0x1b8) from [<
c0051ad4>] (kthread+0xa0/0xac)
<4>[ 4109.550054] [<
c0051ad4>] (kthread+0xa0/0xac) from [<
c000da98>] (ret_from_fork+0x14/0x3c)
<4>[ 4092.709215] CPU: 2 PID: 17844 Comm: mali-utility-wo Not tainted 3.10.0 #136
<4>[ 4092.709408] [<
c0037494>] (mm_update_next_owner+0xc4/0x1c0) from [<
c0037704>] (exit_mm+0x174/0x184)
<4>[ 4092.709422] [<
c0037704>] (exit_mm+0x174/0x184) from [<
c0037918>] (do_exit+0x204/0x400)
<4>[ 4092.709433] [<
c0037918>] (do_exit+0x204/0x400) from [<
c0037bc8>] (do_group_exit+0x88/0xb4)
<4>[ 4092.709447] [<
c0037bc8>] (do_group_exit+0x88/0xb4) from [<
c00444b0>] (get_signal_to_deliver+0x3b4/0x3fc)
<4>[ 4092.709459] [<
c00444b0>] (get_signal_to_deliver+0x3b4/0x3fc) from [<
c0010c00>] (do_signal+0xa0/0x14c)
<4>[ 4092.709469] [<
c0010c00>] (do_signal+0xa0/0x14c) from [<
c0010fa4>] (do_work_pending+0x4c/0x94)
<4>[ 4092.709480] [<
c0010fa4>] (do_work_pending+0x4c/0x94) from [<
c000da40>] (work_pending+0xc/0x20)
cpu0 is waiting for the other cpu respond ipi, but one cpu is blocked on getting &tasklist_lock
while irq is disabled and it will not respond ipi. If all the operation of &tasklist_lock is irq-disabled,
the &tasklist_lock will become available before the owner respond ipi, so the blocked cpu will get the
&tasklist_lock.
Signed-off-by: cl <cl@rock-chips.com>
cl [Tue, 6 Jan 2015 13:02:37 +0000 (21:02 +0800)]
ddr_rk32.c: optimize timeout procedure when change freq
Signed-off-by: cl <cl@rock-chips.com>
cl [Tue, 6 Jan 2015 12:54:14 +0000 (20:54 +0800)]
ddrfreq: complete(&vop_req_completion) must be called after ddrfreq_work is done when VOP_REQ_BLOCK is defined
Signed-off-by: cl <cl@rock-chips.com>
cl [Tue, 6 Jan 2015 11:40:25 +0000 (19:40 +0800)]
ddr_freq: change the type of vop request from andriod
Signed-off-by: cl <cl@rock-chips.com>
张晴 [Tue, 6 Jan 2015 08:06:00 +0000 (16:06 +0800)]
rk312x:pmic:rt5036:modify ldo1 defult voltage 1.2V
Signed-off-by: 张晴 <zhangqing@rock-chips.com>
Huang, Tao [Tue, 6 Jan 2015 04:23:57 +0000 (12:23 +0800)]
ARM: rockchip: enable ARM_ERRATA_821420 for RK3288
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 6 Jan 2015 02:08:16 +0000 (10:08 +0800)]
ARM: errata: Workaround for Cortex-A12 erratum 821420
On Cortex-A12 (r0p0, r0p1), in very rare timing conditions, a sequence of
VMOV to Core registers instructions, for which the second one is in the
shadow of a branch or abort, can lead to a deadlock when the VMOV
instructions are issued out-of-order. This workaround setting bit 1 of
the Internal Feature Register prevents the erratum.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
zwl [Tue, 6 Jan 2015 00:46:14 +0000 (08:46 +0800)]
rk312x: lcdc: the function that adjust GAMMA by config dsp lut is OK
Signed-off-by: zwl <zwl@rockchips.com>
smj [Mon, 5 Jan 2015 09:40:29 +0000 (17:40 +0800)]
rk3128 codec : fix the depop logic of codec
Signed-off-by: smj <smj@rock-chips.com>
许盛飞 [Mon, 5 Jan 2015 07:07:36 +0000 (15:07 +0800)]
battery: update rk818-battery driver
Signed-off-by: 许盛飞 <xsf@rock-chips.com>
xiaoyao [Mon, 5 Jan 2015 02:55:45 +0000 (10:55 +0800)]
rk3128-86v: suspend/resume armoff
zwl [Mon, 5 Jan 2015 01:30:41 +0000 (09:30 +0800)]
rk312x: lvds: fix suspend failed at the first time if uboot logo is set
Signed-off-by: zwl <zwl@rockchips.com>
lyz [Fri, 26 Dec 2014 12:02:21 +0000 (20:02 +0800)]
usb: dwc_otg: fix usb battery charger detect bug
For we don't use charge display function in 3.10 kernel, when
android write 0 to /sys/class/android_usb/android0/enable no need
to set pcd->conn_status = 2 and gating usb clocks.
Signed-off-by: lyz <lyz@rock-chips.com>
Alpha Lin [Sun, 4 Jan 2015 08:12:13 +0000 (16:12 +0800)]
RK3036: fix vpu probe failed problem.
no power domain on rk3036, but trying to enable the power
domain in previous driver code. remove the power domain
enable in this revision on rk3036 platform.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
hjc [Tue, 30 Dec 2014 03:26:01 +0000 (11:26 +0800)]
rk3368 lcdc: fix dsp info config error in interlace mode
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Tue, 30 Dec 2014 03:21:50 +0000 (11:21 +0800)]
rk3368 lvds: config for LVDS TTL mode
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Mon, 29 Dec 2014 03:59:03 +0000 (11:59 +0800)]
rk3368 lcdc: fix shutdown lead to scrash
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Fri, 26 Dec 2014 10:57:32 +0000 (18:57 +0800)]
rk fb: define data format for fbdc
Signed-off-by: hjc <hjc@rock-chips.com>
Wu Liang feng [Wed, 31 Dec 2014 10:13:01 +0000 (18:13 +0800)]
USB: DWC_OTG: fix otg device clk repeatedly disable
The commit
28e9901cf058f17092b91347c0df0bad62962e5e set
otg device phy enter suspend and resume it after system
wakeup. But we don't control the clk, and it will cause
otg device repeatedly disable clk when resume from suspend.
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
chenyifu [Wed, 31 Dec 2014 07:10:03 +0000 (15:10 +0800)]
rk mipi: disable non-continued function of mipi clock
Not all the mipi panel support the non-continued function.
So it is better not support this function in SDK. We can
offer single patch for them who need this function.
Signed-off-by: chenyifu <chenyf@rock-chips.com>
Xiao Feng [Wed, 31 Dec 2014 06:01:07 +0000 (14:01 +0800)]
DMA: memcpy_test: allocate memory using kmalloc
Signed-off-by: Xiao Feng <xf@rock-chips.com>
zsq [Wed, 31 Dec 2014 02:36:39 +0000 (10:36 +0800)]
add rga ION phy addr offset
sugar [Wed, 31 Dec 2014 00:47:14 +0000 (08:47 +0800)]
arm64: dts: rk3368-tb_8846: fix rt3261 codec i2c match.
Signed-off-by: sugar <sugar.zhang@rock-chips.com>
sugar [Wed, 31 Dec 2014 00:53:22 +0000 (08:53 +0800)]
Documentation: sound: add rt3261 codec documentation.
Signed-off-by: sugar <sugar.zhang@rock-chips.com>
smj [Tue, 30 Dec 2014 04:37:24 +0000 (12:37 +0800)]
RK312x codec : fix the codec probably no sound of rk3126
Signed-off-by: lxt <lxt@rock-chips.com>
Mark Yao [Tue, 30 Dec 2014 01:36:32 +0000 (09:36 +0800)]
rk_fb: bmp_helper: remove unalign 24bit bmp check
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
chenzhen [Mon, 29 Dec 2014 09:42:50 +0000 (17:42 +0800)]
mali_760_driver :
handle crash when accessing gpu nodes under /sys in cts test;
upgrade rk_ko_ver to 12.
chenzhen [Mon, 29 Dec 2014 09:36:55 +0000 (17:36 +0800)]
mali_760_driver : reduce period of gpu clk adjusting to 20 ms.
Mark Yao [Mon, 29 Dec 2014 07:06:25 +0000 (15:06 +0800)]
rk_fb: update uboot & kernel logo parse
Sometimes we want to display logo at hdmi screen. but hdmi uboot
resolution maybe different with framebuffer size, so we need read
logo config from regs and decide how to display logo at kernel.
now only support uboot logo size = kernel logo size
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Mon, 29 Dec 2014 07:03:49 +0000 (15:03 +0800)]
rk_fb: bmp_helper: copy bmp data with memcpy
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
zsq [Mon, 29 Dec 2014 03:53:34 +0000 (11:53 +0800)]
close rga debug log
Alpha Lin [Mon, 29 Dec 2014 02:04:19 +0000 (10:04 +0800)]
rk3288, rk3036, rk312x, vpu: new vpu driver.
Define the vpu and hevc as the sub-devices of the vpu_combo on
rk3036 and rk312x, combine the work queue of two device, avoid two
device running in the same time, (cause bus error on platform rk3036
and rk312x).
Huang, Tao [Fri, 26 Dec 2014 15:08:20 +0000 (23:08 +0800)]
ion: fix cma alloc bug
Fix this bug on ARM64:
BUG: failure at mm/slub.c:1351/new_slab()!
Kernel panic - not syncing: BUG!
CPU: 0 PID: 1596 Comm: Binder_5 Tainted: G O 3.10.0 #45
Call trace:
[<
ffffffc00008807c>] dump_backtrace+0x0/0x144
[<
ffffffc0000881d0>] show_stack+0x10/0x1c
[<
ffffffc000892838>] dump_stack+0x1c/0x28
[<
ffffffc00088ffd0>] panic+0xe4/0x210
[<
ffffffc00016673c>] new_slab+0x50/0x248
[<
ffffffc000167b60>] __slab_alloc.isra.59.constprop.63+0x1f4/0x2d0
[<
ffffffc000167cec>] __kmalloc+0xb0/0x1c4
[<
ffffffc000092930>] __dma_alloc_noncoherent+0x7c/0x158
[<
ffffffc000643cf0>] ion_cma_allocate+0xfc/0x27c
[<
ffffffc0006404f8>] ion_alloc+0x134/0x778
[<
ffffffc00064100c>] ion_ioctl+0x15c/0x344
[<
ffffffc00017bfa8>] vfs_ioctl+0x20/0x3c
[<
ffffffc00017c8ac>] do_vfs_ioctl+0x474/0x540
[<
ffffffc00017c9d4>] SyS_ioctl+0x5c/0x88
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Fri, 26 Dec 2014 14:56:49 +0000 (22:56 +0800)]
arm64: rockchip: rk3386: fix ion heap id
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Fri, 26 Dec 2014 14:26:34 +0000 (22:26 +0800)]
Merge branch develop-3.10
Huang, Tao [Fri, 26 Dec 2014 14:26:28 +0000 (22:26 +0800)]
Revert "rk: ion: fix compilation error on arm64"
This reverts commit
6ba08d968d0938cac5d6d6d3ea0e71fd4aa05c27.
Huang, Tao [Fri, 26 Dec 2014 14:26:14 +0000 (22:26 +0800)]
Revert "rk: ion: fix dts parse failure on arm64"
This reverts commit
e46863d23c4753b4f523dcdde0a907c06df40494.
smj [Fri, 26 Dec 2014 13:06:04 +0000 (21:06 +0800)]
rk312x codec : fix the bug of codec capture gain
Huang, Tao [Fri, 26 Dec 2014 05:56:29 +0000 (13:56 +0800)]
arm/configs: add CONFIG_SECCOMP to rockchip_defconfig
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
CMY [Fri, 28 Nov 2014 06:49:59 +0000 (14:49 +0800)]
rk: ion: fix dts parse failure on arm64
CMY [Fri, 24 Oct 2014 06:12:22 +0000 (14:12 +0800)]
rk: ion: fix compilation error on arm64
Conflicts:
drivers/staging/android/ion/rockchip/rockchip_ion.c
include/linux/rockchip_ion.h
dkl [Wed, 17 Dec 2014 08:36:17 +0000 (16:36 +0800)]
clk: rockchip: set aclk_core_div to 4 for all rates in rk3036_apll_table
Set aclk_core_div to 4 for all rates, which makes rk3126\rk3128\rk3126b apll
frequency change stably.
Signed-off-by: dkl <dkl@rock-chips.com>
Wu Liang feng [Thu, 25 Dec 2014 06:52:22 +0000 (14:52 +0800)]
USB: DWC_OTG: Support otg suspend and resume pm
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
CMY [Thu, 25 Dec 2014 03:39:38 +0000 (11:39 +0800)]
ion: export ion_device for some kernel modules
hjc [Thu, 25 Dec 2014 05:59:21 +0000 (13:59 +0800)]
rk3368 lcdc: fix crash when close display
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Tue, 23 Dec 2014 06:26:48 +0000 (14:26 +0800)]
rk fb: add win mirror pos config
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Thu, 18 Dec 2014 03:08:29 +0000 (11:08 +0800)]
rk3368 lcdc: add yuv overlay and close lut when switch hdmi
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Thu, 25 Dec 2014 03:28:56 +0000 (11:28 +0800)]
rk3368 lcdc: fbdc test ok use auto test case
Signed-off-by: hjc <hjc@rock-chips.com>
hjc [Thu, 25 Dec 2014 03:26:52 +0000 (11:26 +0800)]
rk fb: compatible when 32bit system call used on 64bit kernel
Signed-off-by: hjc <hjc@rock-chips.com>
Mark Yao [Thu, 25 Dec 2014 02:06:38 +0000 (10:06 +0800)]
rk312x: lcdc: fix shutdown power and clock deinit
immediately power down lcdc and clock, maybe
regs_update_handler still work, some status would
became wrong.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
lyz [Mon, 15 Dec 2014 12:45:51 +0000 (20:45 +0800)]
usb: support rk3368 OTG device side and EHCI
lyz [Wed, 24 Dec 2014 06:45:38 +0000 (14:45 +0800)]
usb: ohci: backport ohci-platform.c driver from kernel-3.18
lyz [Tue, 23 Dec 2014 06:29:50 +0000 (14:29 +0800)]
usb: ehci: backport ehci-platform.c driver from kernel-3.18
lyz [Mon, 15 Dec 2014 06:27:40 +0000 (14:27 +0800)]
usb: dwc_otg: set dma_mask 32bit for both device and host mode
David Wu [Wed, 24 Dec 2014 08:31:09 +0000 (16:31 +0800)]
rk3368: io-domain: add io domain volt sel
Signed-off-by: David Wu <wdc@rock-chips.com>
lintao [Wed, 24 Dec 2014 07:43:20 +0000 (15:43 +0800)]
mmc: rk_sdmmc: manually zero desc after allocated on ARM64 platform.
ARM64 call dmam_alloc_coherent mathod to allocate descriptor
will not auto clear buffer. So mmc may get wrong d->desc1 calculated that
load wrong address for BUF2 for dual-buf mode if NO CH set in d->desc0.
Then IDMAC will halt for BUF2 in WR_REQ_WAIT state and cannot generate
TI/RI or others in combine-interrupt.
Signed-off-by: lintao <lintao@rock-chips.com>
lintao [Wed, 24 Dec 2014 07:40:20 +0000 (15:40 +0800)]
Revert "arm64: rockchip: rockchip_defconfig disable MMC_DW_IDMAC temporarily"
This reverts commit
da9ae0c513b4a01ff4302a21a82746ddaeb2c16c.
Signed-off-by: lintao <lintao@rock-chips.com>
Huang, Tao [Tue, 23 Dec 2014 14:30:58 +0000 (22:30 +0800)]
arm64: rockchip: rk3368 enable 8 CPUs support
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 23 Dec 2014 13:36:07 +0000 (21:36 +0800)]
ion: rockchip: fix snapshot alignment fault on armv8
Fix this bug:
Unhandled fault: alignment fault (0x96000061) at 0xffffff8000006016
Internal error: :
96000061 [#1] PREEMPT SMP
Modules linked in: dc_fbdev(O) pvrsrvkm(O)
CPU: 0 PID: 125 Comm: Binder_2 Tainted: G O 3.10.0 #36
task:
ffffffc0530f7380 ti:
ffffffc0531c0000 task.ti:
ffffffc0531c0000
PC is at memcpy+0x2c/0x60
LR is at vsnprintf+0x100/0x598
[<
ffffffc0002e093c>] memcpy+0x2c/0x60
[<
ffffffc00018b3bc>] seq_vprintf+0x48/0x84
[<
ffffffc00018b44c>] seq_printf+0x54/0x60
[<
ffffffc00063a238>] ion_alloc+0x4fc/0x778
[<
ffffffc00063a98c>] ion_ioctl+0x164/0x360
[<
ffffffc00017bfa8>] vfs_ioctl+0x20/0x3c
[<
ffffffc00017c8ac>] do_vfs_ioctl+0x474/0x540
[<
ffffffc00017c9d4>] SyS_ioctl+0x5c/0x88
pgprot_noncached will map buffer as MT_DEVICE, but
All store accesses to Device memory use the asynchronous abort mechanism on
Cortex-A53.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
David Wu [Tue, 23 Dec 2014 11:25:51 +0000 (19:25 +0800)]
rk3368: io-domain: sync with upstream to add REGULATOR_EVENT_PRE_VOLTAGE_CHANGE
Signed-off-by: David Wu <wdc@rock-chips.com>
chenjh [Tue, 23 Dec 2014 11:31:23 +0000 (19:31 +0800)]
arm64: rockchip: rk3368-tb_8836 fix cw2015 gpio define
CMY [Tue, 23 Dec 2014 09:51:27 +0000 (17:51 +0800)]
rk: ion: ion's heap id order by heap type
need update android, including:
hardware/rk29/libgralloc_ump/
hardware/rk29/camera/
external/rk-pcba-test/
David Wu [Tue, 23 Dec 2014 08:43:17 +0000 (16:43 +0800)]
rk3368: i2c: fix i2c1&i2c2 reg address and irq error
Signed-off-by: David Wu <wdc@rock-chips.com>
Huang, Tao [Tue, 23 Dec 2014 08:30:13 +0000 (16:30 +0800)]
arm64: rockchip: rk3368 enable 4 big CPUs support
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 23 Dec 2014 08:26:56 +0000 (16:26 +0800)]
arm64: rockchip: rk3368-tb_8836 add tp support
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 23 Dec 2014 07:29:14 +0000 (15:29 +0800)]
arm64: rockchip: rk3368 fix cpu axi init
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
lyz [Mon, 22 Dec 2014 07:48:08 +0000 (15:48 +0800)]
usb: rk312x: rk3126/3128 usb phy tuning set OTG port disconnect
trigger point to 600mv, default is 650mv
Huang, Tao [Fri, 19 Dec 2014 12:02:18 +0000 (20:02 +0800)]
Merge tag 'lsk-v3.10-android-14.12'
LSK Android 14.12 v3.10
Conflicts:
include/linux/clk-provider.h
David Wu [Fri, 19 Dec 2014 11:15:40 +0000 (19:15 +0800)]
rk3368: dma: enable pl330 and dmadevices defconfig
Signed-off-by: David Wu <wdc@rock-chips.com>
David Wu [Fri, 19 Dec 2014 11:13:37 +0000 (19:13 +0800)]
rk3368: uart_dbg: uart_dbg pinctrl is decided by hardware
Signed-off-by: David Wu <wdc@rock-chips.com>
David Wu [Fri, 19 Dec 2014 11:11:42 +0000 (19:11 +0800)]
rk3368: voppwm: add voppwm function
Signed-off-by: David Wu <wdc@rock-chips.com>
chenzhen [Wed, 17 Dec 2014 06:13:01 +0000 (14:13 +0800)]
mali_760_driver, rk_ext :
Add log of ver_info and built_time of mali_ko.
chenzhen [Mon, 15 Dec 2014 06:43:41 +0000 (14:43 +0800)]
mali_760_driver : rk_ext on arm_release_ver, from r5p0-02dev0.
chenzhen [Mon, 15 Dec 2014 06:20:31 +0000 (14:20 +0800)]
mali_760_driver : arm_release_ver r5p0-02dev0.
li bing [Wed, 17 Dec 2014 05:58:18 +0000 (13:58 +0800)]
rk312x: close the bluetooth in the file rk3128-box-rk88.dts.
Huang, Tao [Wed, 17 Dec 2014 05:45:01 +0000 (13:45 +0800)]
arm64: rockchip: build resource.img with logo_kernel.bmp
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Wed, 17 Dec 2014 05:41:37 +0000 (13:41 +0800)]
ARM: rk: kernel.img depends on logo_kernel.bmp
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
yxj [Mon, 15 Dec 2014 11:29:19 +0000 (19:29 +0800)]
arm64: dts: rk3368-tb_8846: enable edp panel
Signed-off-by: yxj <yxj@rock-chips.com>
yxj [Mon, 15 Dec 2014 11:27:08 +0000 (19:27 +0800)]
arm64: dts: rk3368: fix grf, interrupts, resets for edp
Signed-off-by: yxj <yxj@rock-chips.com>
yxj [Thu, 11 Dec 2014 07:45:57 +0000 (15:45 +0800)]
video: rockchip: rk32_dp: add support for rk3368
Signed-off-by: yxj <yxj@rock-chips.com>
yxj [Thu, 11 Dec 2014 06:49:51 +0000 (14:49 +0800)]
video: rockchip: rk32_dp: covert dsb() to dsb(sy)
Signed-off-by: yxj <yxj@rock-chips.com>
Huang, Tao [Tue, 16 Dec 2014 12:55:58 +0000 (20:55 +0800)]
Revert "rk32 dp: port to rk3368"
This reverts commit
b8fdfeb2cfeec753b23236584e9e24b1f3be83c1.
hjc [Tue, 16 Dec 2014 01:44:58 +0000 (09:44 +0800)]
rk3368 lcdc: 1.add YUV domain overlay config; 2.edp force rgb888 output; 3.add 1.8 IO domain selete;
Signed-off-by: hjc <hjc@rock-chips.com>