FROMLIST: ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Change-Id: I472d33fb1db8b1a6b0c4fcea9ab31fd85b61af40
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9324169/)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d23c920fe7b6c93bc9b6e15ffd546496e867851e..ac932a2f57db4198955f22892bc69b51ff0efd9f 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1260,6 +1260,8 @@
                        reg = <0x320>;
                        clocks = <&cru SCLK_OTGPHY0>;
                        clock-names = "phyclk";
+                       resets = <&cru SRST_USBOTG_PHY>;
+                       reset-names = "phy-reset";
                };
 
                usbphy1: usb-phy1 {
@@ -1274,6 +1276,8 @@
                        reg = <0x348>;
                        clocks = <&cru SCLK_OTGPHY2>;
                        clock-names = "phyclk";
+                       resets = <&cru SRST_USBHOST1_PHY>;
+                       reset-names = "phy-reset";
                };
        };